From: Luke Kenneth Casson Leighton Date: Thu, 11 Nov 2021 16:14:58 +0000 (+0000) Subject: debug prints X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=df423ac698b5acd63260e4751569c7621d950d35;p=soc.git debug prints --- diff --git a/src/soc/simple/core.py b/src/soc/simple/core.py index d0149064..80829761 100644 --- a/src/soc/simple/core.py +++ b/src/soc/simple/core.py @@ -647,7 +647,7 @@ class NonProductionCore(ControlBase): print(" %s" % regname, wid, read, write, rdflag) for (funame, fu, idx) in fuspec: fusig = fu.src_i[idx] if readmode else fu.dest[idx] - print(" ", funame, fu, idx, fusig) + print(" ", funame, fu.__class__.__name__, idx, fusig) print() return byregfiles, byregfiles_spec