From: Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Date: Wed, 11 Sep 2013 11:14:39 +0000 (+0000)
Subject: arm.md (arm_shiftsi3): New alternative l/l/M.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=df45c0cc8ddd4c277311cf2b0267c032a74faa01;p=gcc.git

arm.md (arm_shiftsi3): New alternative l/l/M.

[gcc/]

	* config/arm/arm.md (arm_shiftsi3): New alternative l/l/M.


[gcc/testsuite]

	* gcc.target/arm/thumb-ifcvt-2.c: New test.

From-SVN: r202493
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 467377802bf..8b2e2bba301 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2013-09-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+	* config/arm/arm.md (arm_shiftsi3): New alternative l/l/M.
+
 2013-09-11  Richard Biener  <rguenther@suse.de>
 
 	* tree-data-ref.c (dump_rdg_vertex, debug_rdg_vertex,
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 8a482b570ec..0f958041d7c 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -4169,18 +4169,18 @@
 )
 
 (define_insn "*arm_shiftsi3"
-  [(set (match_operand:SI   0 "s_register_operand" "=l,r,r")
+  [(set (match_operand:SI   0 "s_register_operand" "=l,l,r,r")
 	(match_operator:SI  3 "shift_operator"
-	 [(match_operand:SI 1 "s_register_operand"  "0,r,r")
-	  (match_operand:SI 2 "reg_or_int_operand" "l,M,r")]))]
+	 [(match_operand:SI 1 "s_register_operand"  "0,l,r,r")
+	  (match_operand:SI 2 "reg_or_int_operand" "l,M,M,r")]))]
   "TARGET_32BIT"
   "* return arm_output_shift(operands, 0);"
   [(set_attr "predicable" "yes")
-   (set_attr "arch" "t2,*,*")
-   (set_attr "predicable_short_it" "yes,no,no")
+   (set_attr "arch" "t2,t2,*,*")
+   (set_attr "predicable_short_it" "yes,yes,no,no")
    (set_attr "length" "4")
    (set_attr "shift" "1")
-   (set_attr "type" "alu_shift_reg,alu_shift_imm,alu_shift_reg")]
+   (set_attr "type" "alu_shift_reg,alu_shift_imm,alu_shift_imm,alu_shift_reg")]
 )
 
 (define_insn "*shiftsi3_compare"
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index ae9e6e2af62..718e5424a3f 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2013-09-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+	* gcc.target/arm/thumb-ifcvt-2.c: New test.
+
 2013-09-10  Jeff Law  <law@redhat.com>
 
 	* g++.dg/torture/pr58380.C: New test.
diff --git a/gcc/testsuite/gcc.target/arm/thumb-ifcvt-2.c b/gcc/testsuite/gcc.target/arm/thumb-ifcvt-2.c
new file mode 100644
index 00000000000..3da9ef080f4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/thumb-ifcvt-2.c
@@ -0,0 +1,18 @@
+/* Check that Thumb 16-bit shifts by immediate can be if-converted.  */
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_thumb2_ok } */
+/* { dg-options "-O2 -mthumb" } */
+
+int
+foo (int a, int b)
+{
+  if (a != b)
+      a = a << 1;
+  else
+      a = a >> 1;
+
+  return a + b;
+}
+
+/* { dg-final { scan-assembler "lslne" } } */
+/* { dg-final { scan-assembler "asreq" } } */