From: Eddie Hung <eddie@fpgeh.com>
Date: Wed, 21 Aug 2019 19:54:11 +0000 (-0700)
Subject: Fix spacing
X-Git-Tag: working-ls180~1085^2~87
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=df53fe12e7ed667d36d3829681cfc43a3355b834;p=yosys.git

Fix spacing
---

diff --git a/passes/pmgen/xilinx_srl.cc b/passes/pmgen/xilinx_srl.cc
index 2d052534d..bfda55af0 100644
--- a/passes/pmgen/xilinx_srl.cc
+++ b/passes/pmgen/xilinx_srl.cc
@@ -93,7 +93,7 @@ struct XilinxSrlPass : public Pass {
 	{
 		log_header(design, "Executing XILINX_SRL pass (Xilinx shift register extraction).\n");
 
-        int minlen = 3;
+		int minlen = 3;
 
 		size_t argidx;
 		for (argidx = 1; argidx < args.size(); argidx++)
@@ -106,7 +106,7 @@ struct XilinxSrlPass : public Pass {
 		}
 		extra_args(args, argidx, design);
 
-        auto f = std::bind(reduce_chain, std::placeholders::_1, minlen);
+		auto f = std::bind(reduce_chain, std::placeholders::_1, minlen);
 		for (auto module : design->selected_modules())
 			while (xilinx_srl_pm(module, module->selected_cells()).run_reduce(f)) {}
 	}