From: Gabe Black <gblack@eecs.umich.edu>
Date: Mon, 18 Dec 2006 23:18:37 +0000 (-0500)
Subject: Make sure you only handle branch delay slots specially when there actually was a... 
X-Git-Tag: m5_2.0_beta3~268
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=dfafe6741f9865a996488236421d57ea1e6ba815;p=gem5.git

Make sure you only handle branch delay slots specially when there actually was a branch.

--HG--
extra : convert_revision : ea6d33b1b9c2ba5c24225af4b10a9bd25558f1dd
---

diff --git a/src/cpu/o3/commit_impl.hh b/src/cpu/o3/commit_impl.hh
index 194138efc..07aadbfb0 100644
--- a/src/cpu/o3/commit_impl.hh
+++ b/src/cpu/o3/commit_impl.hh
@@ -731,9 +731,14 @@ DefaultCommit<Impl>::commit()
 #if ISA_HAS_DELAY_SLOT
             InstSeqNum bdelay_done_seq_num = squashed_inst;
             bool squash_bdelay_slot = fromIEW->squashDelaySlot[tid];
+            bool branchMispredict = fromIEW->branchMispredict[tid];
 
-            if (!squash_bdelay_slot)
+            // Squashing/not squashing the branch delay slot only makes
+            // sense when you're squashing from a branch, ie from a branch
+            // mispredict.
+            if (branchMispredict && !squash_bdelay_slot) {
                 bdelay_done_seq_num++;
+            }
 #endif
 
             if (fromIEW->includeSquashInst[tid] == true) {