From: bugzilla-daemon <bugzilla-daemon@libre-riscv.org>
Date: Fri, 3 Apr 2020 13:24:01 +0000 (+0000)
Subject: [libre-riscv-dev] [Bug 276] SR NAND Latch needed in nmigen
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=dfbd499a6231ec3419b9ce403afebf1e524d2e12;p=libre-riscv-dev.git

[libre-riscv-dev] [Bug 276] SR NAND Latch needed in nmigen
---

diff --git a/7d/e4456e9c8aa69a0914dbb07ea60d356eff6fd5 b/7d/e4456e9c8aa69a0914dbb07ea60d356eff6fd5
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+Date: Fri, 03 Apr 2020 13:24:01 +0000
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+X-Bugzilla-Severity: enhancement
+X-Bugzilla-Who: lkcl@lkcl.net
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+Message-ID: <bug-276-13-mfBF4PQi0I@http.bugs.libre-riscv.org/>
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+Subject: [libre-riscv-dev] [Bug 276] SR NAND Latch needed in nmigen
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