From: Andrew Waterman <waterman@cs.berkeley.edu>
Date: Thu, 30 Apr 2015 21:31:25 +0000 (-0700)
Subject: Fix commit log for CSR instructions
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=dfee432b27a5e03b91420d13e2dedae2ad0512ea;p=riscv-isa-sim.git

Fix commit log for CSR instructions
---

diff --git a/riscv/processor.cc b/riscv/processor.cc
index 1fe0a9c..6277de0 100644
--- a/riscv/processor.cc
+++ b/riscv/processor.cc
@@ -191,8 +191,10 @@ inline void processor_t::update_histogram(size_t pc)
 static reg_t execute_insn(processor_t* p, reg_t pc, insn_fetch_t fetch)
 {
   reg_t npc = fetch.func(p, fetch.insn, pc);
-  commit_log(p->get_state(), pc, fetch.insn);
-  p->update_histogram(pc);
+  if (npc != PC_SERIALIZE) {
+    commit_log(p->get_state(), pc, fetch.insn);
+    p->update_histogram(pc);
+  }
   return npc;
 }