From: Michael Meissner Date: Tue, 7 Jan 2020 01:29:12 +0000 (+0000) Subject: Add support for large prefixed address in adjusting a vector address. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=dfef3500361057392f3c17e1f97883222347c0ef;p=gcc.git Add support for large prefixed address in adjusting a vector address. 2020-01-06 Michael Meissner * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add support for the offset being 34-bits when -mcpu=future is used. From-SVN: r279937 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 1ba98e4d3ea..b2e6d8504b5 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2020-01-06 Michael Meissner + + * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add support + for the offset being 34-bits when -mcpu=future is used. + 2020-01-06 John David Anglin * config/pa/pa.md: Revert change to use ordered_comparison_operator diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 3011e2d9375..64b40a47449 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -6797,11 +6797,19 @@ rs6000_adjust_vec_address (rtx scalar_reg, HOST_WIDE_INT offset = INTVAL (op1) + INTVAL (element_offset); rtx offset_rtx = GEN_INT (offset); - if (IN_RANGE (offset, -32768, 32767) + /* 16-bit offset. */ + if (SIGNED_INTEGER_16BIT_P (offset) && (scalar_size < 8 || (offset & 0x3) == 0)) new_addr = gen_rtx_PLUS (Pmode, op0, offset_rtx); + + /* 34-bit offset if we have prefixed addresses. */ + else if (TARGET_PREFIXED_ADDR && SIGNED_INTEGER_34BIT_P (offset)) + new_addr = gen_rtx_PLUS (Pmode, op0, offset_rtx); + else { + /* Offset overflowed, move offset to the temporary (which will + likely be split), and do X-FORM addressing. */ emit_move_insn (base_tmp, offset_rtx); new_addr = gen_rtx_PLUS (Pmode, op0, base_tmp); } @@ -6830,6 +6838,12 @@ rs6000_adjust_vec_address (rtx scalar_reg, emit_insn (insn); } + /* Make sure we don't overwrite the temporary if the element being + extracted is variable, and we've put the offset into base_tmp + previously. */ + else if (reg_mentioned_p (base_tmp, element_offset)) + emit_insn (gen_add2_insn (base_tmp, op1)); + else { emit_move_insn (base_tmp, op1);