From: Gabe Black <gblack@eecs.umich.edu>
Date: Sat, 13 Aug 2011 20:36:37 +0000 (-0700)
Subject: O3: At the end of an instruction, force fetchAddr to something sensible.
X-Git-Tag: stable_2012_02_02~136
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e0043f8dbe926ed5bfadb504b0a69b1a1fbfcede;p=gem5.git

O3: At the end of an instruction, force fetchAddr to something sensible.

It's possible (though until now very unlikely) for fetchAddr to get out of
sync with the actual PC of the current instruction. This change forcefull
resets fetchAddr at the end of every instruction.
---

diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh
index 545969d82..d186768d8 100644
--- a/src/cpu/o3/fetch_impl.hh
+++ b/src/cpu/o3/fetch_impl.hh
@@ -1342,6 +1342,8 @@ DefaultFetch<Impl>::fetch(bool &status_change)
             thisPC = nextPC;
 
             if (newMacro) {
+                fetchAddr = thisPC.instAddr() & BaseCPU::PCMask;
+                blkOffset = (fetchAddr - cacheDataPC[tid]) / instSize;
                 pcOffset = 0;
                 curMacroop = NULL;
             }