From: Luke Kenneth Casson Leighton Date: Fri, 18 Jun 2021 12:16:13 +0000 (+0100) Subject: add SV Context SPRs (SVCTX0-7) X-Git-Tag: xlen-bcd~431 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e044ef91234645cf76d4bd2782dd88ca1afc0e58;p=openpower-isa.git add SV Context SPRs (SVCTX0-7) --- diff --git a/openpower/isatables/sprs.csv b/openpower/isatables/sprs.csv index 8fad0c3d..6129170d 100644 --- a/openpower/isatables/sprs.csv +++ b/openpower/isatables/sprs.csv @@ -70,6 +70,14 @@ Idx,SPR,priv_mtspr,priv_mfspr,len 723,SVSHAPE1,yes,yes,32 724,SVSHAPE2,yes,yes,32 725,SVSHAPE3,yes,yes,32 +726,SVCTX0,yes,yes,64 +727,SVCTX1,yes,yes,64 +728,SVCTX2,yes,yes,64 +729,SVCTX3,yes,yes,64 +730,SVCTX4,yes,yes,64 +731,SVCTX5,yes,yes,64 +732,SVCTX6,yes,yes,64 +733,SVCTX7,yes,yes,64 768,SIER,-,no,64 769,MMCR2,no,no,64 770,MMCRA,no,no,64