From: Nicolai Hähnle Date: Wed, 20 Jul 2016 10:30:54 +0000 (+0200) Subject: amdgpu/addrlib: style changes and minor cleanups X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e06aeaf19f34335ad70488d1e8e509e97ac5a01b;p=mesa.git amdgpu/addrlib: style changes and minor cleanups Signed-off-by: Nicolai Hähnle --- diff --git a/src/amd/addrlib/addrinterface.cpp b/src/amd/addrlib/addrinterface.cpp index fbc5e5f9a37..8e6e7ea8d26 100644 --- a/src/amd/addrlib/addrinterface.cpp +++ b/src/amd/addrlib/addrinterface.cpp @@ -75,7 +75,7 @@ ADDR_E_RETURNCODE ADDR_API AddrCreate( *************************************************************************************************** */ ADDR_E_RETURNCODE ADDR_API AddrDestroy( - ADDR_HANDLE hLib) ///< [in] address lib handle + ADDR_HANDLE hLib) ///< address lib handle { ADDR_E_RETURNCODE returnCode = ADDR_OK; @@ -110,7 +110,7 @@ ADDR_E_RETURNCODE ADDR_API AddrDestroy( *************************************************************************************************** */ ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceInfo( - ADDR_HANDLE hLib, ///< [in] address lib handle + ADDR_HANDLE hLib, ///< address lib handle const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] surface information ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) ///< [out] surface parameters and alignments { @@ -144,7 +144,7 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceInfo( *************************************************************************************************** */ ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceAddrFromCoord( - ADDR_HANDLE hLib, ///< [in] address lib handle + ADDR_HANDLE hLib, ///< address lib handle const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, ///< [in] surface info and coordinates ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) ///< [out] surface address { @@ -176,7 +176,7 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceAddrFromCoord( *************************************************************************************************** */ ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceCoordFromAddr( - ADDR_HANDLE hLib, ///< [in] address lib handle + ADDR_HANDLE hLib, ///< address lib handle const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, ///< [in] surface info and address ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut) ///< [out] coordinates { @@ -214,7 +214,7 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceCoordFromAddr( *************************************************************************************************** */ ADDR_E_RETURNCODE ADDR_API AddrComputeHtileInfo( - ADDR_HANDLE hLib, ///< [in] address lib handle + ADDR_HANDLE hLib, ///< address lib handle const ADDR_COMPUTE_HTILE_INFO_INPUT* pIn, ///< [in] Htile information ADDR_COMPUTE_HTILE_INFO_OUTPUT* pOut) ///< [out] Htile pitch, height and size in bytes { @@ -246,7 +246,7 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeHtileInfo( *************************************************************************************************** */ ADDR_E_RETURNCODE ADDR_API AddrComputeHtileAddrFromCoord( - ADDR_HANDLE hLib, ///< [in] address lib handle + ADDR_HANDLE hLib, ///< address lib handle const ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn, ///< [in] Htile info and coordinates ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut) ///< [out] Htile address { @@ -279,7 +279,7 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeHtileAddrFromCoord( *************************************************************************************************** */ ADDR_E_RETURNCODE ADDR_API AddrComputeHtileCoordFromAddr( - ADDR_HANDLE hLib, ///< [in] address lib handle + ADDR_HANDLE hLib, ///< address lib handle const ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn, ///< [in] Htile info and address ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut) ///< [out] Htile coordinates { @@ -318,7 +318,7 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeHtileCoordFromAddr( *************************************************************************************************** */ ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskInfo( - ADDR_HANDLE hLib, ///< [in] address lib handle + ADDR_HANDLE hLib, ///< address lib handle const ADDR_COMPUTE_CMASK_INFO_INPUT* pIn, ///< [in] Cmask pitch and height ADDR_COMPUTE_CMASK_INFO_OUTPUT* pOut) ///< [out] Cmask pitch, height and size in bytes { @@ -350,7 +350,7 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskInfo( *************************************************************************************************** */ ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskAddrFromCoord( - ADDR_HANDLE hLib, ///< [in] address lib handle + ADDR_HANDLE hLib, ///< address lib handle const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn, ///< [in] Cmask info and coordinates ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut) ///< [out] Cmask address { @@ -383,7 +383,7 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskAddrFromCoord( *************************************************************************************************** */ ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskCoordFromAddr( - ADDR_HANDLE hLib, ///< [in] address lib handle + ADDR_HANDLE hLib, ///< address lib handle const ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT* pIn, ///< [in] Cmask info and address ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT* pOut) ///< [out] Cmask coordinates { @@ -421,7 +421,7 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskCoordFromAddr( *************************************************************************************************** */ ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskInfo( - ADDR_HANDLE hLib, ///< [in] address lib handle + ADDR_HANDLE hLib, ///< address lib handle const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, ///< [in] Fmask information ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut) ///< [out] Fmask pitch and height { @@ -453,7 +453,7 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskInfo( *************************************************************************************************** */ ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskAddrFromCoord( - ADDR_HANDLE hLib, ///< [in] address lib handle + ADDR_HANDLE hLib, ///< address lib handle const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn, ///< [in] Fmask info and coordinates ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut) ///< [out] Fmask address { @@ -485,7 +485,7 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskAddrFromCoord( *************************************************************************************************** */ ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskCoordFromAddr( - ADDR_HANDLE hLib, ///< [in] address lib handle + ADDR_HANDLE hLib, ///< address lib handle const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn, ///< [in] Fmask info and address ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut) ///< [out] Fmask coordinates { @@ -521,7 +521,7 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskCoordFromAddr( *************************************************************************************************** */ ADDR_E_RETURNCODE ADDR_API AddrComputeDccInfo( - ADDR_HANDLE hLib, ///< [in] handle of addrlib + ADDR_HANDLE hLib, ///< handle of addrlib const ADDR_COMPUTE_DCCINFO_INPUT* pIn, ///< [in] input ADDR_COMPUTE_DCCINFO_OUTPUT* pOut) ///< [out] output { @@ -631,7 +631,7 @@ BOOL_32 ADDR_API AddrUseCombinedSwizzle(ADDR_HANDLE hLib) *************************************************************************************************** */ ADDR_E_RETURNCODE ADDR_API AddrExtractBankPipeSwizzle( - ADDR_HANDLE hLib, ///< [in] addrlib handle + ADDR_HANDLE hLib, ///< addrlib handle const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT* pIn, ///< [in] input structure ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT* pOut) ///< [out] output structure { @@ -757,7 +757,7 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeBaseSwizzle( *************************************************************************************************** */ ADDR_E_RETURNCODE ADDR_API ElemFlt32ToDepthPixel( - ADDR_HANDLE hLib, ///< [in] addrlib handle + ADDR_HANDLE hLib, ///< addrlib handle const ELEM_FLT32TODEPTHPIXEL_INPUT* pIn, ///< [in] per-component value ELEM_FLT32TODEPTHPIXEL_OUTPUT* pOut) ///< [out] final pixel value { @@ -790,7 +790,7 @@ ADDR_E_RETURNCODE ADDR_API ElemFlt32ToDepthPixel( *************************************************************************************************** */ ADDR_E_RETURNCODE ADDR_API ElemFlt32ToColorPixel( - ADDR_HANDLE hLib, ///< [in] addrlib handle + ADDR_HANDLE hLib, ///< addrlib handle const ELEM_FLT32TOCOLORPIXEL_INPUT* pIn, ///< [in] format, surface number and swap value ELEM_FLT32TOCOLORPIXEL_OUTPUT* pOut) ///< [out] final pixel value { @@ -823,7 +823,7 @@ ADDR_E_RETURNCODE ADDR_API ElemFlt32ToColorPixel( *************************************************************************************************** */ BOOL_32 ADDR_API ElemGetExportNorm( - ADDR_HANDLE hLib, ///< [in] addrlib handle + ADDR_HANDLE hLib, ///< addrlib handle const ELEM_GETEXPORTNORM_INPUT* pIn) ///< [in] input structure { AddrLib* pLib = AddrLib::GetAddrLib(hLib); @@ -857,7 +857,7 @@ BOOL_32 ADDR_API ElemGetExportNorm( *************************************************************************************************** */ ADDR_E_RETURNCODE ADDR_API AddrConvertTileInfoToHW( - ADDR_HANDLE hLib, ///< [in] address lib handle + ADDR_HANDLE hLib, ///< address lib handle const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn, ///< [in] tile info with real value ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut) ///< [out] tile info with HW register value { @@ -889,7 +889,7 @@ ADDR_E_RETURNCODE ADDR_API AddrConvertTileInfoToHW( *************************************************************************************************** */ ADDR_E_RETURNCODE ADDR_API AddrConvertTileIndex( - ADDR_HANDLE hLib, ///< [in] address lib handle + ADDR_HANDLE hLib, ///< address lib handle const ADDR_CONVERT_TILEINDEX_INPUT* pIn, ///< [in] input - tile index ADDR_CONVERT_TILEINDEX_OUTPUT* pOut) ///< [out] tile mode/type/info { @@ -921,7 +921,7 @@ ADDR_E_RETURNCODE ADDR_API AddrConvertTileIndex( *************************************************************************************************** */ ADDR_E_RETURNCODE ADDR_API AddrConvertTileIndex1( - ADDR_HANDLE hLib, ///< [in] address lib handle + ADDR_HANDLE hLib, ///< address lib handle const ADDR_CONVERT_TILEINDEX1_INPUT* pIn, ///< [in] input - tile index ADDR_CONVERT_TILEINDEX_OUTPUT* pOut) ///< [out] tile mode/type/info { @@ -1018,7 +1018,7 @@ ADDR_E_RETURNCODE ADDR_API AddrComputePrtInfo( *************************************************************************************************** */ ADDR_E_RETURNCODE ADDR_API AddrGetMaxAlignments( - ADDR_HANDLE hLib, ///< [in] address lib handle + ADDR_HANDLE hLib, ///< address lib handle ADDR_GET_MAX_ALINGMENTS_OUTPUT* pOut) ///< [out] output structure { AddrLib* pLib = AddrLib::GetAddrLib(hLib); diff --git a/src/amd/addrlib/addrinterface.h b/src/amd/addrlib/addrinterface.h index c6c46845fd5..8724866614c 100644 --- a/src/amd/addrlib/addrinterface.h +++ b/src/amd/addrlib/addrinterface.h @@ -286,7 +286,6 @@ typedef struct _ADDR_REGISTER_VALUE ///< CI registers------------------------------------------------- const UINT_32* pMacroTileConfig; ///< Global macro tile mode table UINT_32 noOfMacroEntries; ///< Number of entries in pMacroTileConfig - } ADDR_REGISTER_VALUE; /** diff --git a/src/amd/addrlib/core/addrlib.cpp b/src/amd/addrlib/core/addrlib.cpp index fbe7930bb02..ec62f03b4d7 100644 --- a/src/amd/addrlib/core/addrlib.cpp +++ b/src/amd/addrlib/core/addrlib.cpp @@ -49,13 +49,13 @@ UINT_32 div64_32(UINT_64 n, UINT_32 base) { high /= base; res = (UINT_64) high << 32; - rem -= (UINT_64) (high*base) << 32; + rem -= (UINT_64) (high * base) << 32; } - while ((INT_64)b > 0 && b < rem) + while (((INT_64)b > 0) && (b < rem)) { - b = b+b; - d = d+d; + b = b + b; + d = d + d; } do @@ -151,11 +151,11 @@ AddrLib::~AddrLib() if (m_pElemLib) { delete m_pElemLib; + m_pElemLib = NULL; } } - /////////////////////////////////////////////////////////////////////////////////////////////////// // Initialization/Helper /////////////////////////////////////////////////////////////////////////////////////////////////// @@ -221,7 +221,7 @@ ADDR_E_RETURNCODE AddrLib::Create( } } - if ((pLib != NULL)) + if (pLib != NULL) { BOOL_32 initValid; @@ -290,14 +290,12 @@ VOID AddrLib::SetAddrChipFamily( UINT_32 uChipFamily, ///< [in] chip family defined in atiih.h UINT_32 uChipRevision) ///< [in] chip revision defined in "asic_family"_id.h { - AddrChipFamily family = ADDR_CHIP_FAMILY_IVLD; - - family = HwlConvertChipFamily(uChipFamily, uChipRevision); + AddrChipFamily family = HwlConvertChipFamily(uChipFamily, uChipRevision); ADDR_ASSERT(family != ADDR_CHIP_FAMILY_IVLD); - m_chipFamily = family; - m_chipRevision = uChipRevision; + m_chipFamily = family; + m_chipRevision = uChipRevision; } /** @@ -314,7 +312,7 @@ VOID AddrLib::SetAddrChipFamily( VOID AddrLib::SetMinPitchAlignPixels( UINT_32 minPitchAlignPixels) ///< [in] minmum pitch alignment in pixels { - m_minPitchAlignPixels = (minPitchAlignPixels == 0)? 1 : minPitchAlignPixels; + m_minPitchAlignPixels = (minPitchAlignPixels == 0) ? 1 : minPitchAlignPixels; } /** @@ -394,13 +392,14 @@ UINT_32 AddrLib::Bits2Number( number <<= 1; } - number>>=1; + number >>= 1; va_end(bits_ptr); return number; } + /////////////////////////////////////////////////////////////////////////////////////////////////// // Element lib /////////////////////////////////////////////////////////////////////////////////////////////////// @@ -433,9 +432,8 @@ ADDR_E_RETURNCODE AddrLib::Flt32ToDepthPixel( if (returnCode == ADDR_OK) { - GetElemLib()->Flt32ToDepthPixel(pIn->format, - pIn->comps, - pOut->pPixel); + GetElemLib()->Flt32ToDepthPixel(pIn->format, pIn->comps, pOut->pPixel); + UINT_32 depthBase = 0; UINT_32 stencilBase = 0; UINT_32 depthBits = 0; @@ -550,9 +548,7 @@ BOOL_32 AddrLib::GetExportNorm( if (returnCode == ADDR_OK) { - enabled = GetElemLib()->PixGetExportNorm(pIn->format, - pIn->num, - pIn->swap); + enabled = GetElemLib()->PixGetExportNorm(pIn->format, pIn->num, pIn->swap); } return enabled; diff --git a/src/amd/addrlib/core/addrlib.h b/src/amd/addrlib/core/addrlib.h index 177aece7c18..d1c5dd755d6 100644 --- a/src/amd/addrlib/core/addrlib.h +++ b/src/amd/addrlib/core/addrlib.h @@ -154,8 +154,7 @@ public: delete this; } - static AddrLib* GetAddrLib( - ADDR_HANDLE hLib); + static AddrLib* GetAddrLib(ADDR_HANDLE hLib); /// Returns AddrLib version (from compiled binary instead include file) UINT_32 GetVersion() @@ -177,8 +176,7 @@ public: const ELEM_FLT32TOCOLORPIXEL_INPUT* pIn, ELEM_FLT32TOCOLORPIXEL_OUTPUT* pOut) const; - BOOL_32 GetExportNorm( - const ELEM_GETEXPORTNORM_INPUT* pIn) const; + BOOL_32 GetExportNorm(const ELEM_GETEXPORTNORM_INPUT* pIn) const; ADDR_E_RETURNCODE GetMaxAlignments(ADDR_GET_MAX_ALINGMENTS_OUTPUT* pOut) const; @@ -193,8 +191,7 @@ protected: // Initialization // /// Pure Virtual function for Hwl computing internal global parameters from h/w registers - virtual BOOL_32 HwlInitGlobalParams( - const ADDR_CREATE_INPUT* pCreateIn) = 0; + virtual BOOL_32 HwlInitGlobalParams(const ADDR_CREATE_INPUT* pCreateIn) = 0; /// Pure Virtual function for Hwl converting chip family virtual AddrChipFamily HwlConvertChipFamily(UINT_32 uChipFamily, UINT_32 uChipRevision) = 0; @@ -206,7 +203,7 @@ protected: static UINT_32 GetNumFragments(UINT_32 numSamples, UINT_32 numFrags) { - return numFrags != 0 ? numFrags : Max(1u, numSamples); + return (numFrags != 0) ? numFrags : Max(1u, numSamples); } /// Returns pointer of AddrElemLib diff --git a/src/amd/addrlib/core/addrlib1.cpp b/src/amd/addrlib/core/addrlib1.cpp index 1fc8fd718d9..3252fd49ada 100644 --- a/src/amd/addrlib/core/addrlib1.cpp +++ b/src/amd/addrlib/core/addrlib1.cpp @@ -125,10 +125,10 @@ AddrLib1::~AddrLib1() * An AddrLib1 class pointer *************************************************************************************************** */ -AddrLib1 * AddrLib1::GetAddrLib1( +AddrLib1* AddrLib1::GetAddrLib1( ADDR_HANDLE hLib) ///< [in] handle of ADDR_HANDLE { - AddrLib *pAddrLib = AddrLib::GetAddrLib(hLib); + AddrLib* pAddrLib = AddrLib::GetAddrLib(hLib); if ((pAddrLib != NULL) && ((pAddrLib->GetAddrChipFamily() == ADDR_CHIP_FAMILY_IVLD) || (pAddrLib->GetAddrChipFamily() > ADDR_CHIP_FAMILY_VI))) @@ -3523,7 +3523,7 @@ ADDR_E_RETURNCODE AddrLib1::ComputePrtInfo( &expandX, &expandY); - if (bpp <8 || bpp == 24 || bpp == 48 || bpp == 96 ) + if (bpp <8 || bpp == 24 || bpp == 48 || bpp == 96) { returnCode = ADDR_INVALIDPARAMS; } @@ -3624,3 +3624,4 @@ ADDR_E_RETURNCODE AddrLib1::ComputePrtInfo( return returnCode; } + diff --git a/src/amd/addrlib/r800/ciaddrlib.cpp b/src/amd/addrlib/r800/ciaddrlib.cpp index 1176ead49ba..776c8b5ce36 100644 --- a/src/amd/addrlib/r800/ciaddrlib.cpp +++ b/src/amd/addrlib/r800/ciaddrlib.cpp @@ -1859,3 +1859,4 @@ ADDR_E_RETURNCODE CiAddrLib::HwlGetMaxAlignments( return ADDR_OK; } + diff --git a/src/amd/addrlib/r800/ciaddrlib.h b/src/amd/addrlib/r800/ciaddrlib.h index 90d6c1b2b90..92d84683c14 100644 --- a/src/amd/addrlib/r800/ciaddrlib.h +++ b/src/amd/addrlib/r800/ciaddrlib.h @@ -128,13 +128,13 @@ protected: const ADDR_TILEINFO* pInfo, AddrTileMode mode, AddrTileType type, INT curIndex = TileIndexInvalid) const; - virtual VOID HwlFmaskPreThunkSurfInfo( + virtual VOID HwlFmaskPreThunkSurfInfo( const ADDR_COMPUTE_FMASK_INFO_INPUT* pFmaskIn, const ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut, ADDR_COMPUTE_SURFACE_INFO_INPUT* pSurfIn, ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut) const; - virtual VOID HwlFmaskPostThunkSurfInfo( + virtual VOID HwlFmaskPostThunkSurfInfo( const ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut, ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut) const; diff --git a/src/amd/addrlib/r800/egbaddrlib.cpp b/src/amd/addrlib/r800/egbaddrlib.cpp index b7c69956d8a..03ae41f0677 100644 --- a/src/amd/addrlib/r800/egbaddrlib.cpp +++ b/src/amd/addrlib/r800/egbaddrlib.cpp @@ -546,7 +546,7 @@ BOOL_32 EgBasedAddrLib::ComputeSurfaceInfoMacroTiled( // is needed. // The original height is pre-stored in pOut->height in PostComputeMipLevel and // pOut->pitch is needed in HwlCheckLastMacroTiledLvl, too. - if (m_configFlags.checkLast2DLevel && numSamples == 1) // Don't check MSAA + if (m_configFlags.checkLast2DLevel && (numSamples == 1)) // Don't check MSAA { // Set a TRUE in pOut if next Level is the first 1D sub level HwlCheckLastMacroTiledLvl(pIn, pOut); @@ -765,7 +765,7 @@ BOOL_32 EgBasedAddrLib::HwlReduceBankWidthHeight( valid = !stillGreater; // Generate a warning if we still fail to meet this constraint - if (!valid) + if (valid == FALSE) { ADDR_WARN( 0, ("TILE_SIZE(%d)*BANK_WIDTH(%d)*BANK_HEIGHT(%d) <= ROW_SIZE(%d)", @@ -1304,7 +1304,7 @@ UINT_64 EgBasedAddrLib::DispatchComputeSurfaceAddrFromCoord( /// @note /// 128 bit/thick tiled surface doesn't support display tiling and /// mipmap chain must have the same tileType, so please fill tileType correctly - if (!IsLinear(pIn->tileMode)) + if (IsLinear(pIn->tileMode) == FALSE) { if (bpp >= 128 || ComputeSurfaceThickness(tileMode) > 1) { @@ -2051,7 +2051,7 @@ VOID EgBasedAddrLib::DispatchComputeSurfaceCoordFromAddr( /// @note /// 128 bit/thick tiled surface doesn't support display tiling and /// mipmap chain must have the same tileType, so please fill tileType correctly - if (!IsLinear(pIn->tileMode)) + if (IsLinear(pIn->tileMode) == FALSE) { if (bpp >= 128 || ComputeSurfaceThickness(tileMode) > 1) { @@ -3378,7 +3378,7 @@ UINT_64 EgBasedAddrLib::ComputeFmaskAddrFromCoordMicroTiled( // // Compute the number of planes. // - if (!resolved) + if (resolved == FALSE) { effectiveSamples = ComputeFmaskNumPlanesFromNumSamples(numSamples); effectiveBpp = numSamples; @@ -3490,7 +3490,7 @@ UINT_64 EgBasedAddrLib::ComputeFmaskAddrFromCoordMacroTiled( // // Compute the number of planes. // - if (!resolved) + if (resolved == FALSE) { effectiveSamples = ComputeFmaskNumPlanesFromNumSamples(numSamples); effectiveBpp = numSamples; @@ -3603,7 +3603,7 @@ VOID EgBasedAddrLib::ComputeFmaskCoordFromAddrMicroTiled( numSamples = 4; } - if (!resolved) + if (resolved == FALSE) { effectiveSamples = ComputeFmaskNumPlanesFromNumSamples(numSamples); effectiveBpp = numSamples; @@ -3698,7 +3698,7 @@ VOID EgBasedAddrLib::ComputeFmaskCoordFromAddrMacroTiled( // // Compute the number of planes. // - if (!resolved) + if (resolved == FALSE) { effectiveSamples = ComputeFmaskNumPlanesFromNumSamples(numSamples); effectiveBpp = numSamples; @@ -4295,7 +4295,7 @@ ADDR_E_RETURNCODE EgBasedAddrLib::HwlComputeSurfaceInfo( pOut->pTileInfo = &tileInfo; } - if (!DispatchComputeSurfaceInfo(pIn, pOut)) + if (DispatchComputeSurfaceInfo(pIn, pOut) == FALSE) { retCode = ADDR_INVALIDPARAMS; } @@ -4323,9 +4323,10 @@ ADDR_E_RETURNCODE EgBasedAddrLib::HwlComputeSurfaceInfo( if (IsMacroTiled(pOut->tileMode)) { // If a valid index is returned, then no pTileInfo is okay - ADDR_ASSERT(!m_configFlags.useTileIndex || pOut->tileIndex != TileIndexInvalid); + ADDR_ASSERT((m_configFlags.useTileIndex == FALSE) || + (pOut->tileIndex != TileIndexInvalid)); - if (!IsTileInfoAllZero(pIn->pTileInfo)) + if (IsTileInfoAllZero(pIn->pTileInfo) == FALSE) { // The initial value of pIn->pTileInfo is copied to tileInfo // We do not expect any of these value to be changed nor any 0 of inputs @@ -4525,7 +4526,7 @@ UINT_32 EgBasedAddrLib::HwlGetPitchAlignmentMicroTiled( // Note: this actually does not work for mipmap but mipmap depth texture is not really // sampled with mipmap. // - if (flags.depth && !flags.noStencil) + if (flags.depth && (flags.noStencil == FALSE)) { bpp = 8; } @@ -4615,3 +4616,4 @@ UINT_32 EgBasedAddrLib::HwlStereoCheckRightOffsetPadding( return stereoHeightAlign; } + diff --git a/src/amd/addrlib/r800/egbaddrlib.h b/src/amd/addrlib/r800/egbaddrlib.h index b8eabd816ff..d43eca81aae 100644 --- a/src/amd/addrlib/r800/egbaddrlib.h +++ b/src/amd/addrlib/r800/egbaddrlib.h @@ -149,7 +149,7 @@ protected: /// Return Cmask block max virtual BOOL_32 HwlGetMaxCmaskBlockMax() const { - return 16383; // 14 bits + return 0x3FFF; // 14 bits, 0n16383 } // Sub-hwl interface @@ -325,7 +325,7 @@ private: const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const; - VOID DispatchComputeSurfaceCoordFromAddr( + VOID DispatchComputeSurfaceCoordFromAddr( const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut) const; @@ -345,7 +345,7 @@ private: ADDR_TILEINFO* pTileInfo, UINT_32* pBitPosition) const; - VOID ComputeSurfaceCoordFromAddrMacroTiled( + VOID ComputeSurfaceCoordFromAddrMacroTiled( UINT_64 addr, UINT_32 bitPosition, UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSamples, AddrTileMode tileMode, UINT_32 tileBase, UINT_32 compBits, @@ -359,7 +359,7 @@ private: const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn, ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut) const; - VOID DispatchComputeFmaskCoordFromAddr( + VOID DispatchComputeFmaskCoordFromAddr( const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn, ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut) const; @@ -369,13 +369,13 @@ private: UINT_32 pitch, UINT_32 height, UINT_32 numSamples, AddrTileMode tileMode, BOOL_32 resolved, UINT_32* pBitPosition) const; - VOID ComputeFmaskCoordFromAddrMicroTiled( + VOID ComputeFmaskCoordFromAddrMicroTiled( UINT_64 addr, UINT_32 bitPosition, UINT_32 pitch, UINT_32 height, UINT_32 numSamples, AddrTileMode tileMode, BOOL_32 resolved, UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample, UINT_32* pPlane) const; - VOID ComputeFmaskCoordFromAddrMacroTiled( + VOID ComputeFmaskCoordFromAddrMacroTiled( UINT_64 addr, UINT_32 bitPosition, UINT_32 pitch, UINT_32 height, UINT_32 numSamples, AddrTileMode tileMode, UINT_32 pipeSwizzle, UINT_32 bankSwizzle, diff --git a/src/amd/addrlib/r800/siaddrlib.cpp b/src/amd/addrlib/r800/siaddrlib.cpp index 2b7e9c9bd49..869cc56c1fe 100644 --- a/src/amd/addrlib/r800/siaddrlib.cpp +++ b/src/amd/addrlib/r800/siaddrlib.cpp @@ -1252,7 +1252,7 @@ UINT_32 SiAddrLib::HwlPreHandleBaseLvl3xPitch( // From SI, if pow2Pad is 1 the pitch is expanded 3x first, then padded to pow2, so nothing to // do here - if (!pIn->flags.pow2Pad) + if (pIn->flags.pow2Pad == FALSE) { AddrLib1::HwlPreHandleBaseLvl3xPitch(pIn, expPitch); } @@ -1285,7 +1285,7 @@ UINT_32 SiAddrLib::HwlPostHandleBaseLvl3xPitch( * be able to compute a correct pitch from it as h/w address library is doing the job. */ // From SI, the pitch is expanded 3x first, then padded to pow2, so no special handler here - if (!pIn->flags.pow2Pad) + if (pIn->flags.pow2Pad == FALSE) { AddrLib1::HwlPostHandleBaseLvl3xPitch(pIn, expPitch); } @@ -1378,7 +1378,7 @@ UINT_64 SiAddrLib::HwlGetSizeAdjustmentMicroTiled( // Note: this actually does not work for mipmap but mipmap depth texture is not really // sampled with mipmap. // - if (flags.depth && !flags.noStencil) + if (flags.depth && (flags.noStencil == FALSE)) { ADDR_ASSERT(numSamples == 1); @@ -1465,7 +1465,7 @@ VOID SiAddrLib::HwlSetupTileInfo( INT index = TileIndexInvalid; // Fail-safe code - if (!IsLinear(tileMode)) + if (IsLinear(tileMode) == FALSE) { // 128 bpp/thick tiling must be non-displayable. // Fmask reuse color buffer's entry but bank-height field can be from another entry @@ -2196,11 +2196,12 @@ BOOL_32 SiAddrLib::HwlComputeMipLevel( // Note: Don't check expand 3x formats(96 bit) as the basePitch is not pow2 even if // we explicity set pow2Pad flag. The 3x base pitch is padded to pow2 but after being // divided by expandX factor (3) - to program texture pitch, the basePitch is never pow2. - if (!AddrElemLib::IsExpand3x(pIn->format)) + if (AddrElemLib::IsExpand3x(pIn->format) == FALSE) { // Sublevel pitches are generated from base level pitch instead of width on SI // If pow2Pad is 0, we don't assert - as this is not really used for a mip chain - ADDR_ASSERT(!pIn->flags.pow2Pad || ((pIn->basePitch != 0) && IsPow2(pIn->basePitch))); + ADDR_ASSERT((pIn->flags.pow2Pad == FALSE) || + ((pIn->basePitch != 0) && IsPow2(pIn->basePitch))); } if (pIn->basePitch != 0) @@ -2386,7 +2387,7 @@ INT_32 SiAddrLib::HwlPostCheckTileIndex( // 3. tile info does not match for macro tiled if ((index == TileIndexInvalid || (mode != m_tileTable[index].mode) || - (macroTiled && !HwlTileInfoEqual(pInfo, &m_tileTable[index].info)))) + (macroTiled && (HwlTileInfoEqual(pInfo, &m_tileTable[index].info) == FALSE)))) { for (index = 0; index < static_cast(m_noOfEntries); index++) { @@ -2446,7 +2447,7 @@ ADDR_E_RETURNCODE SiAddrLib::HwlSetupTileCfg( INT_32 macroModeIndex, ///< [in] Index in macro tile mode table(CI) ADDR_TILEINFO* pInfo, ///< [out] Tile Info AddrTileMode* pMode, ///< [out] Tile mode - AddrTileType* pType ///< [out] Tile type + AddrTileType* pType ///< [out] Tile type ) const { ADDR_E_RETURNCODE returnCode = ADDR_OK; @@ -2684,7 +2685,7 @@ UINT_32 SiAddrLib::HwlComputeFmaskBits( { ADDR_ASSERT(numFrags <= 8); - if (!pIn->resolved) + if (pIn->resolved == FALSE) { if (numFrags == 1) { @@ -2745,7 +2746,7 @@ UINT_32 SiAddrLib::HwlComputeFmaskBits( } else // Normal AA { - if (!pIn->resolved) + if (pIn->resolved == FALSE) { bpp = ComputeFmaskNumPlanesFromNumSamples(numSamples); numSamples = numSamples == 2 ? 8 : numSamples; @@ -2861,3 +2862,4 @@ ADDR_E_RETURNCODE SiAddrLib::HwlGetMaxAlignments( return ADDR_OK; } + diff --git a/src/amd/addrlib/r800/siaddrlib.h b/src/amd/addrlib/r800/siaddrlib.h index ba1d4b5466a..50373ccec75 100644 --- a/src/amd/addrlib/r800/siaddrlib.h +++ b/src/amd/addrlib/r800/siaddrlib.h @@ -205,13 +205,13 @@ protected: const ADDR_TILEINFO* pInfo, AddrTileMode mode, AddrTileType type, INT curIndex = TileIndexInvalid) const; - virtual VOID HwlFmaskPreThunkSurfInfo( + virtual VOID HwlFmaskPreThunkSurfInfo( const ADDR_COMPUTE_FMASK_INFO_INPUT* pFmaskIn, const ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut, ADDR_COMPUTE_SURFACE_INFO_INPUT* pSurfIn, ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut) const; - virtual VOID HwlFmaskPostThunkSurfInfo( + virtual VOID HwlFmaskPostThunkSurfInfo( const ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut, ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut) const;