From: Miodrag Milanovic <mmicko@gmail.com>
Date: Wed, 1 Jan 2020 15:13:14 +0000 (+0100)
Subject: take skip wire bits into account
X-Git-Tag: working-ls180~892^2~1
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e0c879684f510ae6fd1169c90d137e660c88e6be;p=yosys.git

take skip wire bits into account
---

diff --git a/passes/techmap/iopadmap.cc b/passes/techmap/iopadmap.cc
index 47da98b06..531ac2b99 100644
--- a/passes/techmap/iopadmap.cc
+++ b/passes/techmap/iopadmap.cc
@@ -234,6 +234,9 @@ struct IopadmapPass : public Pass {
 						SigBit wire_bit(wire, i);
 						Cell *tbuf_cell = nullptr;
 
+						if (skip_wire_bits.count(wire_bit))
+							continue;
+
 						if (tbuf_bits.count(wire_bit))
 							tbuf_cell = tbuf_bits.at(wire_bit);