From: Nick Clifton Date: Wed, 29 Jul 1998 14:11:16 +0000 (+0000) Subject: remove earlyclobber constraint from extendqisi2_insn X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e0d75375e722d868b1544fe69b3cb2f7b35ce434;p=gcc.git remove earlyclobber constraint from extendqisi2_insn From-SVN: r21471 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index fc00c8452e8..0b87938f408 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +Wed Jul 29 11:47:10 1998 Nick Clifton + + * config/arm/thumb.md (extendqisi2_insn): Remove earlyclobber + constraint from second alternative. + Tue Jul 28 23:29:04 1998 Jason Merrill * configure.in: Fix --without/--disable cases for local-prefix, diff --git a/gcc/config/arm/thumb.md b/gcc/config/arm/thumb.md index 6886b8e2496..0369bb1c6b0 100644 --- a/gcc/config/arm/thumb.md +++ b/gcc/config/arm/thumb.md @@ -470,7 +470,7 @@ ") (define_insn "*extendqisi2_insn" - [(set (match_operand:SI 0 "register_operand" "=l,&l") + [(set (match_operand:SI 0 "register_operand" "=l,l") (sign_extend:SI (match_operand:QI 1 "memory_operand" "V,m")))] "" "* @@ -484,16 +484,21 @@ { ops[1] = XEXP (XEXP (operands[1], 0), 0); ops[2] = XEXP (XEXP (operands[1], 0), 1); + output_asm_insn (\"ldrsb\\t%0, [%1, %2]\", ops); + } + else if (REGNO (operands[0]) == REGNO (XEXP (operands[1], 0))) + { + output_asm_insn (\"ldrb\\t%0, [%0, #0]\;lsl\\t%0, %0, #24\;asr\\t%0, %0, #24\", ops); } else { ops[1] = XEXP (operands[1], 0); ops[2] = const0_rtx; + output_asm_insn (\"mov\\t%0, %2\;ldrsb\\t%0, [%1, %0]\", ops); } - output_asm_insn (\"mov\\t%0, %2\;ldrsb\\t%0, [%1, %0]\", ops); return \"\"; }" -[(set_attr "length" "2,4")]) +[(set_attr "length" "2,6")]) ;; We don't really have extzv, but defining this using shifts helps ;; to reduce register pressure later on.