From: Anuj Phogat <anuj.phogat@gmail.com>
Date: Tue, 26 Mar 2019 22:45:29 +0000 (-0700)
Subject: iris/icl: Set Enabled Texel Offset Precision Fix bit
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e0f4359ec12e8e8dcd96d658b8ef3e308ffe8859;p=mesa.git

iris/icl: Set Enabled Texel Offset Precision Fix bit

h/w specification requires this bit to be always set.
See Mesa commit 5eb173304bd.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
---

diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c
index 1ae9c557a27..ddce0023dbe 100644
--- a/src/gallium/drivers/iris/iris_state.c
+++ b/src/gallium/drivers/iris/iris_state.c
@@ -707,6 +707,13 @@ iris_init_render_context(struct iris_screen *screen,
       }
       iris_emit_lri(batch, SAMPLER_MODE, reg_val);
 
+      /* Bit 1 must be set in HALF_SLICE_CHICKEN7. */
+      iris_pack_state(GENX(HALF_SLICE_CHICKEN7), &reg_val, reg) {
+         reg.EnabledTexelOffsetPrecisionFix = 1;
+         reg.EnabledTexelOffsetPrecisionFixMask = 1;
+      }
+      iris_emit_lri(batch, HALF_SLICE_CHICKEN7, reg_val);
+
       // XXX: 3D_MODE?
 #endif