From: Xan Date: Wed, 25 Apr 2018 10:44:18 +0000 (+0100) Subject: (no commit message) X-Git-Tag: convert-csv-opcode-to-binary~5531 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e11c9a41b5af74bf68b1abc49ad0b6b2a5550471;p=libreriscv.git --- diff --git a/Comparative_analysis_Harmonised_RVP_vs_Andes_Packed_SIMD_ISA_proposal.mdwn b/Comparative_analysis_Harmonised_RVP_vs_Andes_Packed_SIMD_ISA_proposal.mdwn index 4cabb93bb..f139ea238 100644 --- a/Comparative_analysis_Harmonised_RVP_vs_Andes_Packed_SIMD_ISA_proposal.mdwn +++ b/Comparative_analysis_Harmonised_RVP_vs_Andes_Packed_SIMD_ISA_proposal.mdwn @@ -34,8 +34,8 @@ | v27 | 32bit GPR or Vector[4xB or 2xH] | 32bit GPR or Vector[2xUH] | | v28 | 32bit GPR or Vector[4xB or 2xH] | 32bit GPR or Vector[2xUH] | | v29 | 32bit GPR or Vector[4xB or 2xH] | 32bit GPR or Vector[2xUH] | -| v30 | 32bit GPR or Vector[4xB or 2xH] | 32bit GPR or Vector[1xUW] | -| v31 | 32bit GPR or Vector[4xB or 2xH] | 32bit GPR or Vector[1xUW] | +| v30 | 32bit GPR or Vector[4xB or 2xH] | 32bit GPR or Vector[1xSW] | +| v31 | 32bit GPR or Vector[4xB or 2xH] | 32bit GPR or Vector[1xSW] |