From: Andrew Waterman Date: Mon, 23 Jan 2012 01:56:46 +0000 (-0800) Subject: work around gcc 4.4 bug X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e1592aebf6e17542671b2a6d4baeeb86d5df3342;p=riscv-isa-sim.git work around gcc 4.4 bug --- diff --git a/riscv/decode.h b/riscv/decode.h index 9c364f6..b76617a 100644 --- a/riscv/decode.h +++ b/riscv/decode.h @@ -203,8 +203,8 @@ private: #define sext32(x) ((sreg_t)(int32_t)(x)) #define zext32(x) ((reg_t)(uint32_t)(x)) -#define sext_xprlen(x) ((sreg_t(x) << (64-xprlen)) >> (64-xprlen)) -#define zext_xprlen(x) ((reg_t(x) << (64-xprlen)) >> (64-xprlen)) +#define sext_xprlen(x) (((sreg_t)(x) << (64-xprlen)) >> (64-xprlen)) +#define zext_xprlen(x) (((reg_t)(x) << (64-xprlen)) >> (64-xprlen)) #ifndef RISCV_ENABLE_RVC # define set_pc(x) \