From: Clifford Wolf Date: Sat, 6 Sep 2014 09:46:07 +0000 (+0200) Subject: Added "test_cell -script" X-Git-Tag: yosys-0.4~162 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e1743b3bac8c86f3cf857892dabf66bec5573a7a;p=yosys.git Added "test_cell -script" --- diff --git a/passes/tests/test_cell.cc b/passes/tests/test_cell.cc index f82bbfeb3..26aad4354 100644 --- a/passes/tests/test_cell.cc +++ b/passes/tests/test_cell.cc @@ -380,6 +380,9 @@ struct TestCellPass : public Pass { log(" -simplib\n"); log(" use \"techmap -map +/simlib.v -max_iter 2 -autoproc\"\n"); log("\n"); + log(" -script {script_file}\n"); + log(" instead of calling \"techmap\", call \"script {script_file}\".\n"); + log("\n"); log(" -v\n"); log(" print additional debug information to the console\n"); log("\n"); @@ -416,6 +419,10 @@ struct TestCellPass : public Pass { num_iter = 1; continue; } + if (args[argidx] == "-script" && argidx+1 < SIZE(args)) { + techmap_cmd = "script " + args[++argidx]; + continue; + } if (args[argidx] == "-simlib") { techmap_cmd = "techmap -map +/simlib.v -max_iter 2 -autoproc"; continue; @@ -540,7 +547,7 @@ struct TestCellPass : public Pass { Frontend::frontend_call(design, NULL, std::string(), "ilang " + ilang_file); else create_gold_module(design, cell_type, cell_types.at(cell_type)); - Pass::call(design, stringf("copy gold gate; %s gate; opt gate", techmap_cmd.c_str())); + Pass::call(design, stringf("copy gold gate; cd gate; %s; cd ..; opt -fast gate", techmap_cmd.c_str())); Pass::call(design, "miter -equiv -flatten -make_outputs -ignore_gold_x gold gate miter"); if (verbose) Pass::call(design, "dump gate");