From: Gabe Black <gblack@eecs.umich.edu>
Date: Mon, 29 Jan 2007 15:48:20 +0000 (-0500)
Subject: A minor hack to get branch prediction to behave like before on Alpha.
X-Git-Tag: m5_2.0_beta3~241
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e176c7d1ff5b4470a7602b124eebe1db9e63660d;p=gem5.git

A minor hack to get branch prediction to behave like before on Alpha.

--HG--
extra : convert_revision : 1eaabd13c72aa42c512a04d162a87491818bc621
---

diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh
index 90d3868a5..b80fc72e1 100644
--- a/src/cpu/o3/fetch_impl.hh
+++ b/src/cpu/o3/fetch_impl.hh
@@ -1150,6 +1150,10 @@ DefaultFetch<Impl>::fetch(bool &status_change)
                                      instruction->staticInst,
                                      instruction->readPC());
 
+            ///FIXME This needs to be more robust in dealing with delay slots
+#if !ISA_HAS_DELAY_SLOT
+            predicted_branch |=
+#endif
             lookupAndUpdateNextPC(instruction, next_PC, next_NPC);
             predicted_branch |= (next_PC != fetch_NPC);