From: Eddie Hung <eddie@fpgeh.com>
Date: Sat, 18 Jan 2020 00:06:20 +0000 (-0800)
Subject: Consistency
X-Git-Tag: working-ls180~863^2~2
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e17f3f8c63603746ad3aa33e9900d91e9b86db39;p=yosys.git

Consistency
---

diff --git a/passes/pmgen/ice40_dsp.pmg b/passes/pmgen/ice40_dsp.pmg
index fca307453..9d649cb98 100644
--- a/passes/pmgen/ice40_dsp.pmg
+++ b/passes/pmgen/ice40_dsp.pmg
@@ -56,10 +56,12 @@ code sigA sigB sigH
 			break;
 		sigH.append(O[i]);
 	}
-	log_assert(nusers(O.extract_end(i)) <= 1);
-
-	if (sigH.empty())
+	// This sigM could have no users if downstream sinks (e.g. $add) is
+	//   narrower than $mul result, for example
+	if (i == 0)
 		reject;
+
+	log_assert(nusers(O.extract_end(i)) <= 1);
 endcode
 
 code argQ ffA ffAholdmux ffArstmux ffAholdpol ffArstpol sigA clock clock_pol
diff --git a/passes/pmgen/xilinx_dsp.pmg b/passes/pmgen/xilinx_dsp.pmg
index b9a4b0864..20925c0dc 100644
--- a/passes/pmgen/xilinx_dsp.pmg
+++ b/passes/pmgen/xilinx_dsp.pmg
@@ -460,7 +460,7 @@ arg argD argQ clock
 
 code
 	dff = nullptr;
-	if (GetSize(argQ) == 0)
+	if (argQ.empty() == 0)
 		reject;
 	for (const auto &c : argQ.chunks()) {
 		// Abandon matches when 'Q' is a constant