From: Luke Kenneth Casson Leighton Date: Fri, 5 Jun 2020 12:40:19 +0000 (+0100) Subject: whoops returning cr2 for cr3 regspec map X-Git-Tag: div_pipeline~562 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e1ad948b2d7e144583c040ac86ee2546644f9133;p=soc.git whoops returning cr2 for cr3 regspec map --- diff --git a/src/soc/decoder/power_regspec_map.py b/src/soc/decoder/power_regspec_map.py index 63435ae2..4b01a1ca 100644 --- a/src/soc/decoder/power_regspec_map.py +++ b/src/soc/decoder/power_regspec_map.py @@ -64,7 +64,7 @@ def regspec_decode(e, regfile, name): if name == 'cr_b': # CR B return e.read_cr2.ok, 1<<(7-e.read_cr2.data), None if name == 'cr_c': # CR C - return e.read_cr3.ok, 1<<(7-e.read_cr2.data), None + return e.read_cr3.ok, 1<<(7-e.read_cr3.data), None if regfile == 'XER': # XERRegs register numbering is *unary* encoded