From: Nathan Binkert <binkertn@umich.edu>
Date: Mon, 19 Sep 2005 01:22:57 +0000 (-0400)
Subject: Tweak the set of coalesced interrupts
X-Git-Tag: m5_1.1~15
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e1c61e5b2f041b5b0a48ae2ba146d537757d5e01;p=gem5.git

Tweak the set of coalesced interrupts

dev/ns_gige.cc:
    clean up usage of ISR_FOO macros
dev/ns_gige_reg.h:
    Clean up #defines
    make ISR_RXIDLE and ISR_TXIDLE coalesced

--HG--
extra : convert_revision : fd64fc6a441d096fc45737fdcb837de8868ca10a
---

diff --git a/dev/ns_gige.cc b/dev/ns_gige.cc
index d93e155bf..6aae7b9eb 100644
--- a/dev/ns_gige.cc
+++ b/dev/ns_gige.cc
@@ -1211,7 +1211,7 @@ NSGigE::devIntrPost(uint32_t interrupts)
     if (interrupts & ISR_NOIMPL)
         warn("interrupt not implemented %#x\n", interrupts);
 
-    interrupts &= ~ISR_NOIMPL;
+    interrupts &= ISR_IMPL;
     regs.isr |= interrupts;
 
     if (interrupts & regs.imr) {
@@ -1247,7 +1247,7 @@ NSGigE::devIntrPost(uint32_t interrupts)
 
     if ((regs.isr & regs.imr)) {
         Tick when = curTick;
-        if (!(regs.isr & regs.imr & ISR_NODELAY))
+        if ((regs.isr & regs.imr & ISR_NODELAY) == 0)
             when += intrDelay;
         cpuIntrPost(when);
     }
@@ -1289,8 +1289,7 @@ NSGigE::devIntrClear(uint32_t interrupts)
         postedRxOrn++;
     }
 
-    if (regs.isr & regs.imr & (ISR_SWI | ISR_RXIDLE | ISR_RXOK | ISR_RXDESC |
-                               ISR_TXOK | ISR_TXIDLE | ISR_TXDESC | ISR_RXORN) )
+    if (regs.isr & regs.imr & ISR_IMPL)
         postedInterrupts++;
 
     interrupts &= ~ISR_NOIMPL;
diff --git a/dev/ns_gige_reg.h b/dev/ns_gige_reg.h
index 77b12dbd8..cbbe1dc95 100644
--- a/dev/ns_gige_reg.h
+++ b/dev/ns_gige_reg.h
@@ -171,9 +171,12 @@
 #define ISR_RXDESC	0x00000002
 #define ISR_RXOK	0x00000001
 #define ISR_ALL         0x7FFFFFFF
-#define ISR_NODELAY	(ISR_ALL & ~(ISR_RXOK|ISR_RXDESC|ISR_TXOK|ISR_TXDESC))
-#define ISR_NOIMPL	(~(ISR_SWI|ISR_TXIDLE|ISR_TXDESC|ISR_TXOK|ISR_RXORN| \
-                           ISR_RXIDLE|ISR_RXDESC|ISR_RXOK))
+#define ISR_DELAY	(ISR_TXIDLE|ISR_TXDESC|ISR_TXOK| \
+                         ISR_RXIDLE|ISR_RXDESC|ISR_RXOK)
+#define ISR_NODELAY	(ISR_ALL & ~ISR_DELAY)
+#define ISR_IMPL        (ISR_SWI|ISR_TXIDLE|ISR_TXDESC|ISR_TXOK|ISR_RXORN| \
+                         ISR_RXIDLE|ISR_RXDESC|ISR_RXOK)
+#define ISR_NOIMPL	(ISR_ALL & ~ISR_IMPL)
 
 /* transmit configuration register */
 #define TX_CFG_CSI	0x80000000