From: Iago Toral Quiroga Date: Thu, 14 Jan 2016 07:55:28 +0000 (+0100) Subject: i965/fs: Fix fs_visitor::VARYING_PULL_CONSTANT_LOAD for doubles X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e209134f717078fb6c1d4a6d048b4aba22c87993;p=mesa.git i965/fs: Fix fs_visitor::VARYING_PULL_CONSTANT_LOAD for doubles v2 (Curro): - Assert on scale == 1 when shuffling 64-bit data. - Remove type_slots, use type_sz(vec4_result.type) instead. Reviewed-by: Kenneth Graunke Reviewed-by: Francisco Jerez --- diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index 2d235853737..6ef1e236e2f 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp @@ -194,8 +194,15 @@ fs_visitor::VARYING_PULL_CONSTANT_LOAD(const fs_builder &bld, else op = FS_OPCODE_VARYING_PULL_CONSTANT_LOAD; + /* The pull load message will load a vec4 (16 bytes). If we are loading + * a double this means we are only loading 2 elements worth of data. + * We also want to use a 32-bit data type for the dst of the load operation + * so other parts of the driver don't get confused about the size of the + * result. + */ int regs_written = 4 * (bld.dispatch_width() / 8) * scale; - fs_reg vec4_result = fs_reg(VGRF, alloc.allocate(regs_written), dst.type); + fs_reg vec4_result = fs_reg(VGRF, alloc.allocate(regs_written), + BRW_REGISTER_TYPE_F); fs_inst *inst = bld.emit(op, vec4_result, surf_index, vec4_offset); inst->regs_written = regs_written; @@ -208,7 +215,15 @@ fs_visitor::VARYING_PULL_CONSTANT_LOAD(const fs_builder &bld, inst->mlen = 1 + bld.dispatch_width() / 8; } - bld.MOV(dst, offset(vec4_result, bld, ((const_offset & 0xf) / 4) * scale)); + if (type_sz(dst.type) == 8) { + assert(scale == 1); + shuffle_32bit_load_result_to_64bit_data( + bld, retype(vec4_result, dst.type), vec4_result, 2); + } + + vec4_result.type = dst.type; + bld.MOV(dst, offset(vec4_result, bld, + (const_offset & 0xf) / type_sz(vec4_result.type) * scale)); } /**