From: Mihail Ionescu <mihail.ionescu@arm.com>
Date: Thu, 31 Oct 2019 11:22:58 +0000 (+0000)
Subject: Add support for context sensitive '.arch_extension' to the ARM assembler.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e20f9590e78473b3b944d606c28a519094eedea0;p=binutils-gdb.git

Add support for context sensitive '.arch_extension' to the ARM assembler.

If the extension is not found in the context sensitive table, the legacy
tables are still checked as a fallback.  This is particularly useful for
Armv8.1-M as it enables  the use of '.arch_extension' with the 'mve' and
'mve.fp' extensions which are not part of the legacy table.

	* config/tc-arm.c (selected_ctx_ext_table) New static variable.
	(arm_parse_arch): Set context sensitive extension table based on the
	chosen base architecture.
	(s_arm_arch_extension): Change to lookup extensions in the new context
	sensitive tables.
	* gas/testsuite/gas/arm/mve-ext.s: New.
	* gas/testsuite/gas/arm/mve-ext.d: New.
	* gas/testsuite/gas/arm/mvefp-ext.s: New.
	* gas/testsuite/gas/arm/mvefp-ext.d: New.
---

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 84a3a9a3a1f..25a504b3748 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,15 @@
+2019-10-31  Mihail Ionescu  <mihail.ionescu@arm.com>
+
+	* config/tc-arm.c (selected_ctx_ext_table) New static variable.
+	(arm_parse_arch): Set context sensitive extension table based on the
+	chosen base architecture.
+	(s_arm_arch_extension): Change to lookup extensions in the new context
+	sensitive tables.
+	* gas/testsuite/gas/arm/mve-ext.s: New.
+	* gas/testsuite/gas/arm/mve-ext.d: New.
+	* gas/testsuite/gas/arm/mvefp-ext.s: New.
+	* gas/testsuite/gas/arm/mvefp-ext.d: New.
+
 2019-10-30  Delia Burduv  <Delia.Burduv@arm.com>
 
 	* config/tc-aarch64.c (parse_address_main): Accept the omission of
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index 1f462307ed9..0a3e77a1ecd 100644
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -355,6 +355,7 @@ static arm_feature_set selected_fpu = FPU_NONE;
 /* Feature bits selected by the last .object_arch directive.  */
 static arm_feature_set selected_object_arch = ARM_ARCH_NONE;
 /* Must be long enough to hold any of the names in arm_cpus.  */
+static const struct arm_ext_table * selected_ctx_ext_table = NULL;
 static char selected_cpu_name[20];
 
 extern FLONUM_TYPE generic_floating_point_number;
@@ -31502,6 +31503,7 @@ arm_parse_arch (const char *str)
 	  march_ext_opt = XNEW (arm_feature_set);
 	*march_ext_opt = arm_arch_none;
 	march_fpu_opt = &opt->default_fpu;
+	selected_ctx_ext_table = opt->ext_table;
 	strcpy (selected_cpu_name, opt->name);
 
 	if (ext != NULL)
@@ -32361,6 +32363,35 @@ s_arm_arch_extension (int ignored ATTRIBUTE_UNUSED)
       name += 2;
     }
 
+  /* Check the context specific extension table */
+  if (selected_ctx_ext_table)
+    {
+      const struct arm_ext_table * ext_opt;
+      for (ext_opt = selected_ctx_ext_table; ext_opt->name != NULL; ext_opt++)
+        {
+          if (streq (ext_opt->name, name))
+	    {
+	      if (adding_value)
+		{
+		  if (ARM_FEATURE_ZERO (ext_opt->merge))
+		    /* TODO: Option not supported.  When we remove the
+		    legacy table this case should error out.  */
+		    continue;
+		  ARM_MERGE_FEATURE_SETS (selected_ext, selected_ext,
+					  ext_opt->merge);
+		}
+	      else
+		ARM_CLEAR_FEATURE (selected_ext, selected_ext, ext_opt->clear);
+
+	      ARM_MERGE_FEATURE_SETS (selected_cpu, selected_arch, selected_ext);
+	      ARM_MERGE_FEATURE_SETS (cpu_variant, selected_cpu, selected_fpu);
+	      *input_line_pointer = saved_char;
+	      demand_empty_rest_of_line ();
+	      return;
+	    }
+	}
+    }
+
   for (opt = arm_extensions; opt->name != NULL; opt++)
     if (streq (opt->name, name))
       {
diff --git a/gas/testsuite/gas/arm/mve-ext.d b/gas/testsuite/gas/arm/mve-ext.d
new file mode 100644
index 00000000000..3529231bcf4
--- /dev/null
+++ b/gas/testsuite/gas/arm/mve-ext.d
@@ -0,0 +1,8 @@
+# name: MVE context sensitive .arch_extension
+# as: -march=armv8.1-m.main
+# objdump: -dr --prefix-addresses --show-raw-insn -marmv8.1-m.main
+
+.*: +file format .*arm.*
+
+Disassembly of section .text:
+0[0-9a-f]+ <[^>]+> ea52 136f 	asrl	r2, r3, #5
diff --git a/gas/testsuite/gas/arm/mve-ext.s b/gas/testsuite/gas/arm/mve-ext.s
new file mode 100644
index 00000000000..8d4c7c68e59
--- /dev/null
+++ b/gas/testsuite/gas/arm/mve-ext.s
@@ -0,0 +1,4 @@
+.syntax unified
+.arch_extension mve
+
+asrl	r2, r3, #5
diff --git a/gas/testsuite/gas/arm/mvefp-ext.d b/gas/testsuite/gas/arm/mvefp-ext.d
new file mode 100644
index 00000000000..530a73561e0
--- /dev/null
+++ b/gas/testsuite/gas/arm/mvefp-ext.d
@@ -0,0 +1,8 @@
+# name: MVE fp context sensitive .arch_extension
+# as: -march=armv8.1-m.main
+# objdump: -dr --prefix-addresses --show-raw-insn -marmv8.1-m.main
+
+.*: +file format .*arm.*
+
+Disassembly of section .text:
+[^>]*> eea1 0fc0 	vshlc	q0, r0, #1
diff --git a/gas/testsuite/gas/arm/mvefp-ext.s b/gas/testsuite/gas/arm/mvefp-ext.s
new file mode 100644
index 00000000000..28c5f94ea80
--- /dev/null
+++ b/gas/testsuite/gas/arm/mvefp-ext.s
@@ -0,0 +1,5 @@
+.syntax unified
+.thumb
+.arch_extension mve.fp
+
+vshlc q0, r0, #1