From: lkcl <lkcl@web>
Date: Sun, 26 Mar 2023 21:42:57 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls001_v3~36
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e21321bd6c530f4e2a74d751fc8057ed907aa18e;p=libreriscv.git

---

diff --git a/openpower/sv/rfc/ls009.mdwn b/openpower/sv/rfc/ls009.mdwn
index 50aecd061..846ab816d 100644
--- a/openpower/sv/rfc/ls009.mdwn
+++ b/openpower/sv/rfc/ls009.mdwn
@@ -311,8 +311,10 @@ included in the RAW Hazards because it is involved in calculating
 how many registers are to be considered Indices.
 
 With these Hazard Mitigations in place, high-performance implementations
-may read-cache the Indices from the point where a given `svindex` instruction
-is called (or SVSHAPE SPRs - and MAXVL- directly altered).
+may read-cache the Indices at the point where a given `svindex` instruction
+is called (or SVSHAPE SPRs - and MAXVL - directly altered) by issuing
+background GPR register file reads whilst other instructions are being
+issued and executed.
 
 The original motivation for Indexed REMAP was to mitigate the need to add
 an expensive `mv.x` to the Scalar ISA, which was likely to be rejected as