From: Eddie Hung <eddie@fpgeh.com>
Date: Thu, 18 Jul 2019 22:21:23 +0000 (-0700)
Subject: Make consistent
X-Git-Tag: working-ls180~1039^2~335
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e22a7522422ec5f2f6db52d4e9c98d09868ea3e3;p=yosys.git

Make consistent
---

diff --git a/techlibs/common/mul2dsp.v b/techlibs/common/mul2dsp.v
index 2819c939e..ee53701ee 100644
--- a/techlibs/common/mul2dsp.v
+++ b/techlibs/common/mul2dsp.v
@@ -201,7 +201,8 @@ module \$__mul_gen (A, B, Y);
 				.B(B[B_WIDTH-1 : (n-1)*(`DSP_B_MAXWIDTH-sign_headroom)]),
 				.Y(partial[n-1])
 			);
-			assign Y = (partial[n-1] << (n-1)*(`DSP_B_MAXWIDTH-sign_headroom)) + partial_sum[n-2];
+			assign partial_sum[n-1] = (partial[n-1] << (n-1)*(`DSP_A_MAXWIDTH-sign_headroom)) + partial_sum[n-2];
+			assign Y = partial_sum[n-1];
 		end
 		else begin 
 			if (A_SIGNED)