From: Gabe Black <gblack@eecs.umich.edu>
Date: Sun, 15 Nov 2009 03:22:30 +0000 (-0800)
Subject: ARM: Define a mask to differentiate purely CPSR bits from CondCodes bits.
X-Git-Tag: stable_2012_02_02~1575^2~69
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e2ab64543b2a206c95fbf38565a50f0d5bba0f2a;p=gem5.git

ARM: Define a mask to differentiate purely CPSR bits from CondCodes bits.
---

diff --git a/src/arch/arm/miscregs.hh b/src/arch/arm/miscregs.hh
index 45233a764..d100efb8e 100644
--- a/src/arch/arm/miscregs.hh
+++ b/src/arch/arm/miscregs.hh
@@ -93,6 +93,10 @@ namespace ArmISA
         Bitfield<4, 0> mode;
     EndBitUnion(CPSR)
 
+    // This mask selects bits of the CPSR that actually go in the CondCodes
+    // integer register to allow renaming.
+    static const uint32_t CondCodesMask = 0xF80F0000;
+
     BitUnion32(SCTLR)
         Bitfield<30> te;  // Thumb Exception Enable
         Bitfield<29> afe; // Access flag enable