From: bugzilla-daemon <bugzilla-daemon@libre-riscv.org>
Date: Sat, 4 Apr 2020 08:15:12 +0000 (+0000)
Subject: [libre-riscv-dev] [Bug 276] SR NAND Latch needed in nmigen
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e2c3625d079d40768cd3c274ec100dc4e75d9c36;p=libre-riscv-dev.git

[libre-riscv-dev] [Bug 276] SR NAND Latch needed in nmigen
---

diff --git a/c6/c5d84b0bea79a0863f33b49d916b0a7a581404 b/c6/c5d84b0bea79a0863f33b49d916b0a7a581404
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@@ -0,0 +1,67 @@
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+Date: Sat, 04 Apr 2020 08:15:12 +0000
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+X-Bugzilla-Severity: enhancement
+X-Bugzilla-Who: whitequark@whitequark.org
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+Message-ID: <bug-276-13-Typs11pRHg@http.bugs.libre-riscv.org/>
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+Subject: [libre-riscv-dev] [Bug 276] SR NAND Latch needed in nmigen
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