From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Wed, 17 May 2023 16:00:02 +0000 (+0100)
Subject: small whitespace cleanup
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e2d408e3214357b4638f464dd644df7e665d9a7f;p=openpower-isa.git

small whitespace cleanup
---

diff --git a/src/openpower/decoder/power_insn.py b/src/openpower/decoder/power_insn.py
index e2d8ec3b..c6ea0ca5 100644
--- a/src/openpower/decoder/power_insn.py
+++ b/src/openpower/decoder/power_insn.py
@@ -2335,7 +2335,8 @@ class CROpMRRM(MRBaseRM, ZZCombinedBaseRM, CROpBaseRM):
     sz: BaseRM[23]
 
 
-class CROpFF5RM(FFRc0BaseRM, PredicateBaseRM, VLiBaseRM, DZBaseRM, SZBaseRM, CROpBaseRM):
+class CROpFF5RM(FFRc0BaseRM, PredicateBaseRM, VLiBaseRM, DZBaseRM,
+                SZBaseRM, CROpBaseRM):
     """crop: ffirst 5-bit mode"""
     VLi: BaseRM[19]
     RC1 = 1
@@ -3219,7 +3220,8 @@ class SVP64OperandMeta(type):
 
     class SVP64XOStaticOperand(SpanStaticOperand):
         def __init__(self, record, value, span):
-            return super().__init__(record=record, name="XO", value=value, span=span)
+            return super().__init__(record=record, name="XO",
+                                    value=value, span=span)
 
     __TRANSFORM = {
         NonZeroOperand: SVP64NonZeroOperand,