From: Nanley Chery Date: Wed, 31 Jul 2019 21:38:29 +0000 (-0700) Subject: isl: Reduce assertions during aux surf creation X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e2e67b3f11bf11dedab77322a28c87c32d5ed30a;p=mesa.git isl: Reduce assertions during aux surf creation Return false more often to reduce the burden on the caller. Reviewed-by: Kenneth Graunke --- diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c index f1859588013..909da464dd2 100644 --- a/src/intel/isl/isl.c +++ b/src/intel/isl/isl.c @@ -1662,6 +1662,9 @@ isl_surf_get_hiz_surf(const struct isl_device *dev, { assert(ISL_DEV_GEN(dev) >= 5 && ISL_DEV_USE_SEPARATE_STENCIL(dev)); + if (!isl_surf_usage_is_depth(surf->usage)) + return false; + /* HiZ only works with Y-tiled depth buffers */ if (!isl_tiling_is_any_y(surf->tiling)) return false; @@ -1766,16 +1769,16 @@ isl_surf_get_mcs_surf(const struct isl_device *dev, const struct isl_surf *surf, struct isl_surf *mcs_surf) { + /* It must be multisampled with an array layout */ + if (surf->msaa_layout != ISL_MSAA_LAYOUT_ARRAY) + return false; + /* The following are true of all multisampled surfaces */ assert(surf->samples > 1); assert(surf->dim == ISL_SURF_DIM_2D); assert(surf->levels == 1); assert(surf->logical_level0_px.depth == 1); - /* It must be multisampled with an array layout */ - if (surf->msaa_layout != ISL_MSAA_LAYOUT_ARRAY) - return false; - /* From the Ivy Bridge PRM, Vol4 Part1 p77 ("MCS Enable"): * * This field must be set to 0 for all SINT MSRTs when all RT channels @@ -1829,7 +1832,10 @@ isl_surf_get_ccs_surf(const struct isl_device *dev, struct isl_surf *ccs_surf, uint32_t row_pitch_B) { - assert(surf->samples == 1 && surf->msaa_layout == ISL_MSAA_LAYOUT_NONE); + if (surf->samples > 1) + return false; + + assert(surf->msaa_layout == ISL_MSAA_LAYOUT_NONE); /* CCS support does not exist prior to Gen7 */ if (ISL_DEV_GEN(dev) <= 6) @@ -1838,6 +1844,10 @@ isl_surf_get_ccs_surf(const struct isl_device *dev, if (surf->usage & ISL_SURF_USAGE_DISABLE_AUX_BIT) return false; + /* Callers don't yet support this configuration. */ + if (isl_surf_usage_is_depth_or_stencil(surf->usage)) + return false; + /* The PRM doesn't say this explicitly, but fast-clears don't appear to * work for 3D textures until gen9 where the layout of 3D textures changes * to match 2D array textures.