From: Hugh Blemings Date: Wed, 13 May 2020 01:22:01 +0000 (+1000) Subject: Re: [libre-riscv-dev] [OpenPOWER-HDL-Cores] little-endian only power cores and spec... X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e381458c0c7ff9f9744b363502be50c01e4fa5c0;p=libre-riscv-dev.git Re: [libre-riscv-dev] [OpenPOWER-HDL-Cores] little-endian only power cores and spec compliance --- diff --git a/85/c43f6342319dd4eb04be9d9f3de9ee08ee8904 b/85/c43f6342319dd4eb04be9d9f3de9ee08ee8904 new file mode 100644 index 0000000..9142c41 --- /dev/null +++ b/85/c43f6342319dd4eb04be9d9f3de9ee08ee8904 @@ -0,0 +1,99 @@ +Return-path: +Envelope-to: publicinbox@libre-riscv.org +Delivery-date: Wed, 13 May 2020 02:22:07 +0100 +Received: from localhost ([::1] helo=libre-riscv.org) + by libre-soc.org with esmtp (Exim 4.89) + (envelope-from ) + id 1jYg62-0006ky-V4; Wed, 13 May 2020 02:22:06 +0100 +Received: from ozlabs.org ([203.11.71.1]) + by libre-soc.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) + (Exim 4.89) (envelope-from ) id 1jYg60-0006kl-Q7 + for libre-riscv-dev@lists.libre-riscv.org; Wed, 13 May 2020 02:22:05 +0100 +Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) + (No client certificate requested) + by mail.ozlabs.org (Postfix) with ESMTPSA id 49MH2f14Q6z9sSf; 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