From: William D. Jones Date: Mon, 1 Feb 2021 04:57:13 +0000 (-0500) Subject: machxo2: Add DCCA and DCMA blackbox primitives. X-Git-Tag: working-ls180~48 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e3974809ec55395fad4f6b407b03784f397e3f30;p=yosys.git machxo2: Add DCCA and DCMA blackbox primitives. --- diff --git a/techlibs/machxo2/cells_sim.v b/techlibs/machxo2/cells_sim.v index e046d0c87..c6d70a055 100644 --- a/techlibs/machxo2/cells_sim.v +++ b/techlibs/machxo2/cells_sim.v @@ -188,6 +188,23 @@ module OSCH #( ); endmodule +(* blackbox *) +module DCCA ( + input CLKI, + input CE, + output CLKO +); +endmodule + +(* blackbox *) +module DCMA ( + input CLK0, + input CLK1, + input SEL, + output DCMOUT +); +endmodule + // IO- "$__" cells for the iopadmap pass. These are temporary cells not meant // to be instantiated by the end user. They are required in this file for // attrmvcp to work.