From: lkcl <lkcl@web>
Date: Thu, 21 Apr 2022 22:00:43 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~2631
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e3b6a974e0d24492f8629ab3357a739d10b7724b;p=libreriscv.git

---

diff --git a/openpower/isa/svfixedarith.mdwn b/openpower/isa/svfixedarith.mdwn
index 32c8f09c3..bb0c798b2 100644
--- a/openpower/isa/svfixedarith.mdwn
+++ b/openpower/isa/svfixedarith.mdwn
@@ -15,21 +15,3 @@ Pseudo-code:
 Special Registers Altered:
 
     None
-
-# [DRAFT] Twin Multiply and Subtract Doubleword
-
-* msubed RT,RA,RB,RC
-
-Pseudocode:
-
-    <!-- SVP64: RA,RB,RC,RT have EXTRA2, RS as below   -->
-    <!-- bit 8 of EXTRA is clear: RS.[s|v]=RT.[s|v]+VL -->
-    <!-- bit 8 of EXTRA is set  : RS.[s|v]=RC.[s|v]    -->
-    prod[0:127] <- (RA) * (RB)
-    sub[0:127] <- EXTZ(RC) - prod
-    RT <- sub[64:127]
-    RS <- sub[0:63]
-
-Special Registers Altered:
-
-    None