From: Luke Kenneth Casson Leighton Date: Wed, 14 Nov 2018 20:26:38 +0000 (+0000) Subject: add bit about kazan, also mention targets X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e4127a2a9f7498713644b241284c2b90cb546736;p=crowdsupply.git add bit about kazan, also mention targets --- diff --git a/markdown/pre-launch.md b/markdown/pre-launch.md index 89f302e..c01ea02 100644 --- a/markdown/pre-launch.md +++ b/markdown/pre-launch.md @@ -3,16 +3,22 @@ Libre RICS-V M-Class A 100% libre RISC-V + 3D GPU chip for mobile devices The Libre RISC-V M-Class is a RISC-V chip that is libre-licensed to the -bedrock. It's a low-power, mobile-class, 1.5 GHz, 64-bit SoC suitable -for tablet, netbook, and industrial embedded systems. Full source code -and files are available not only for the operating system and -bootloader, but also for the processor, its peripherals and its -3D GPU and VPU. +bedrock. It is a low-power, mobile-class, 64-bit Quad-Core SoC at a +minimum 800mhz clock rate, suitable for tablet, netbook, and industrial +embedded systems. Full source code and files are available not only +for the operating system and bootloader, but also for the processor, +its peripherals and its 3D GPU and VPU. Onboard the Libre RISC-V M-Class is the -[Kazan3D](https://salsa.debian.org/Kazan-team/kazan) GPU, a +[Kazan](https://salsa.debian.org/Kazan-team/kazan) GPU, a libre-licensed software-rendered -[Vulkan3D](https://www.khronos.org/vulkan/) LLVM Driver written in -Rust. Optimised 3D instructions will be designed and added to the -Libre RISC-V M-Class SoC, to reach a mobile-class performance and -power budget. +[Vulkan](https://www.khronos.org/vulkan/) Driver written in +Rust that uses LLVM for code generation. Kazan will use Optimised 3D +instructions specifically designed and added to the Libre RISC-V M-Class +SoC, yet Kazan itself may still be used (unoptimised) on other hardware. + +The performance target for Kazan on the Libre RISCV SoC is a very modest +mobile-class level (1280x720 25fps, 100MPixels/sec, 30MTriangles/sec, +5-6GFLOPs), whilst the power budget is very tight: under 2.5 watts in 28nm. +With RISC-V being 40% more power efficient than x86 or ARM, this is +very reasonably achievable.