From: Clifford Wolf <clifford@clifford.at>
Date: Fri, 22 Nov 2013 11:46:02 +0000 (+0100)
Subject: Enable {* .. *} feature per default (removes dependency to REJECT feature in flex)
X-Git-Tag: yosys-0.2.0~336
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e4429c480ea224ab9b5b0a98dbf5d9661a291b11;p=yosys.git

Enable {* .. *} feature per default (removes dependency to REJECT feature in flex)
---

diff --git a/README b/README
index a5e3d5974..29e99611d 100644
--- a/README
+++ b/README
@@ -265,8 +265,7 @@ Verilog Attributes and non-standard features
 - In addition to the (* ... *) attribute syntax, yosys supports
   the non-standard {* ... *} attribute syntax to set default attributes
   for everything that comes after the {* ... *} statement. (Reset
-  by adding an empty {* *} statement.) The preprocessor define
-  __YOSYS_ENABLE_DEFATTR__ must be set in order for this feature to be active.
+  by adding an empty {* *} statement.)
 
 
 Workarounds for known build problems
diff --git a/frontends/verilog/lexer.l b/frontends/verilog/lexer.l
index 353f0a79b..a0deb755b 100644
--- a/frontends/verilog/lexer.l
+++ b/frontends/verilog/lexer.l
@@ -45,7 +45,6 @@ using namespace VERILOG_FRONTEND;
 namespace VERILOG_FRONTEND {
 	std::vector<std::string> fn_stack;
 	std::vector<int> ln_stack;
-	bool lexer_feature_defattr;
 }
 
 %}
@@ -82,9 +81,6 @@ namespace VERILOG_FRONTEND {
 
 "`timescale"[ \t]+[^ \t\r\n/]+[ \t]*"/"[ \t]*[^ \t\r\n]* /* ignore timescale directive */
 
-"`yosys_enable_defattr" lexer_feature_defattr = true;
-"`yosys_disable_defattr" lexer_feature_defattr = false;
-
 "`"[a-zA-Z_$][a-zA-Z0-9_$]* {
 	frontend_verilog_yyerror("Unimplemented compiler directive or undefined macro %s.", yytext);
 }
@@ -225,8 +221,8 @@ supply1 { return TOK_SUPPLY1; }
 "(*" { return ATTR_BEGIN; }
 "*)" { return ATTR_END; }
 
-"{*"  { if (lexer_feature_defattr) return DEFATTR_BEGIN; else REJECT; }
-"*}"  { if (lexer_feature_defattr) return DEFATTR_END; else REJECT; }
+"{*"  { return DEFATTR_BEGIN; }
+"*}"  { return DEFATTR_END; }
 
 "**" { return OP_POW; }
 "||" { return OP_LOR; }
diff --git a/frontends/verilog/preproc.cc b/frontends/verilog/preproc.cc
index 2033a290f..9f824526a 100644
--- a/frontends/verilog/preproc.cc
+++ b/frontends/verilog/preproc.cc
@@ -198,13 +198,6 @@ static void input_file(FILE *f, std::string filename)
 	input_buffer.insert(it, "`file_pop\n");
 }
 
-static std::string define_to_feature(std::string defname)
-{
-	if (defname == "__YOSYS_ENABLE_DEFATTR__")
-		return "defattr";
-	return std::string();
-}
-
 std::string frontend_verilog_preproc(FILE *f, std::string filename, const std::map<std::string, std::string> pre_defines_map, const std::list<std::string> include_dirs)
 {
 	std::map<std::string, std::string> defines_map(pre_defines_map);
@@ -298,8 +291,6 @@ std::string frontend_verilog_preproc(FILE *f, std::string filename, const std::m
 			std::string name, value;
 			skip_spaces();
 			name = next_token(true);
-			if (!define_to_feature(name).empty())
-				output_code.push_back("`yosys_enable_" + define_to_feature(name));
 			skip_spaces();
 			int newline_count = 0;
 			while (!tok.empty()) {
@@ -331,8 +322,6 @@ std::string frontend_verilog_preproc(FILE *f, std::string filename, const std::m
 			std::string name;
 			skip_spaces();
 			name = next_token(true);
-			if (!define_to_feature(name).empty())
-				output_code.push_back("`yosys_disable_" + define_to_feature(name));
 			// printf("undef: >>%s<<\n", name.c_str());
 			defines_map.erase(name);
 			continue;
diff --git a/frontends/verilog/verilog_frontend.cc b/frontends/verilog/verilog_frontend.cc
index fb2b57ad0..1d26de73f 100644
--- a/frontends/verilog/verilog_frontend.cc
+++ b/frontends/verilog/verilog_frontend.cc
@@ -206,8 +206,6 @@ struct VerilogFrontend : public Frontend {
 			fp = fmemopen((void*)code_after_preproc.c_str(), code_after_preproc.size(), "r");
 		}
 
-		lexer_feature_defattr = false;
-
 		frontend_verilog_yyset_lineno(1);
 		frontend_verilog_yyrestart(fp);
 		frontend_verilog_yyparse();
diff --git a/frontends/verilog/verilog_frontend.h b/frontends/verilog/verilog_frontend.h
index 222de7e7f..8b4fae6e9 100644
--- a/frontends/verilog/verilog_frontend.h
+++ b/frontends/verilog/verilog_frontend.h
@@ -42,9 +42,6 @@ namespace VERILOG_FRONTEND
 
 	// this function converts a Verilog constant to an AST_CONSTANT node
 	AST::AstNode *const2ast(std::string code, char case_type = 0);
-
-	// lexer state variables
-	extern bool lexer_feature_defattr;
 }
 
 // the pre-processor