From: Jozef Lawrynowicz <jozef.l@mittosystems.com>
Date: Thu, 6 Jun 2019 09:23:10 +0000 (+0000)
Subject: MSP430: Emulate 16-bit shifts with rotate insn when src operand is in memory
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e445e4b4feb25facd3a61787c51c96eb3bda66f1;p=gcc.git

MSP430: Emulate 16-bit shifts with rotate insn when src operand is in memory

gcc/ChangeLog

2019-06-06  Jozef Lawrynowicz  <jozef.l@mittosystems.com>

	* config/msp430/msp430.md (ashlhi3): Force shift src operand into a
	register if it is in memory, so the shift can be emulated with a rotate
	instruction.
	(ashrhi3): Likewise.
	(lshrhi3): Likewise.

gcc/testsuite/ChangeLog

2019-06-06  Jozef Lawrynowicz  <jozef.l@mittosystems.com>

	* gcc.target/msp430/emulate-slli.c: New test.
	* gcc.target/msp430/emulate-srai.c: New test.
	* gcc.target/msp430/emulate-srli.c: New test.

From-SVN: r271993
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index e6dd35a8eaa..7ddc942bd7a 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2019-06-06  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
+
+	* config/msp430/msp430.md (ashlhi3): Force shift src operand into a
+	register if it is in memory, so the shift can be emulated with a rotate
+	instruction.
+	(ashrhi3): Likewise.
+	(lshrhi3): Likewise.
+
 2019-06-06  Martin Liska  <mliska@suse.cz>
 
 	PR tree-optimization/87954
diff --git a/gcc/config/msp430/msp430.md b/gcc/config/msp430/msp430.md
index 344d21d9378..58c1f4edc9c 100644
--- a/gcc/config/msp430/msp430.md
+++ b/gcc/config/msp430/msp430.md
@@ -756,8 +756,9 @@
 		   (match_operand:HI 2 "general_operand")))]
   ""
   {
-    if (GET_CODE (operands[1]) == SUBREG
-        && REG_P (XEXP (operands[1], 0)))
+    if ((GET_CODE (operands[1]) == SUBREG
+	 && REG_P (XEXP (operands[1], 0)))
+	|| MEM_P (operands[1]))
       operands[1] = force_reg (HImode, operands[1]);
     if (msp430x
         && REG_P (operands[0])
@@ -828,8 +829,9 @@
 		     (match_operand:HI 2 "general_operand")))]
   ""
   {
-    if (GET_CODE (operands[1]) == SUBREG
-        && REG_P (XEXP (operands[1], 0)))
+    if ((GET_CODE (operands[1]) == SUBREG
+	 && REG_P (XEXP (operands[1], 0)))
+	|| MEM_P (operands[1]))
       operands[1] = force_reg (HImode, operands[1]);
     if (msp430x
         && REG_P (operands[0])
@@ -916,8 +918,9 @@
 		     (match_operand:HI 2 "general_operand")))]
   ""
   {
-    if (GET_CODE (operands[1]) == SUBREG
-        && REG_P (XEXP (operands[1], 0)))
+    if ((GET_CODE (operands[1]) == SUBREG
+	 && REG_P (XEXP (operands[1], 0)))
+	|| MEM_P (operands[1]))
       operands[1] = force_reg (HImode, operands[1]);
     if (msp430x
         && REG_P (operands[0])
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 4bc2c290667..c08d228b613 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2019-06-06  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
+
+	* gcc.target/msp430/emulate-slli.c: New test.
+	* gcc.target/msp430/emulate-srai.c: New test.
+	* gcc.target/msp430/emulate-srli.c: New test.
+
 2019-06-06  Martin Liska  <mliska@suse.cz>
 
 	PR tree-optimization/87954
diff --git a/gcc/testsuite/gcc.target/msp430/emulate-slli.c b/gcc/testsuite/gcc.target/msp430/emulate-slli.c
new file mode 100644
index 00000000000..0ed09d55d8c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/msp430/emulate-slli.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-Os" } */
+/* { dg-final { scan-assembler-not "mspabi_slli" } } */
+/* { dg-final { scan-assembler "rlax" } } */
+
+/* Ensure that HImode shifts with source operand in memory are emulated with a
+   rotate instructions.  */
+
+int a;
+
+void
+foo (void)
+{
+  a = a << 4;
+}
diff --git a/gcc/testsuite/gcc.target/msp430/emulate-srai.c b/gcc/testsuite/gcc.target/msp430/emulate-srai.c
new file mode 100644
index 00000000000..66291717a02
--- /dev/null
+++ b/gcc/testsuite/gcc.target/msp430/emulate-srai.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-Os" } */
+/* { dg-final { scan-assembler-not "mspabi_srai" } } */
+/* { dg-final { scan-assembler "rrax" } } */
+
+/* Ensure that HImode shifts with source operand in memory are emulated with a
+   rotate instructions.  */
+
+int a;
+
+void
+foo (void)
+{
+  a = a >> 4;
+}
diff --git a/gcc/testsuite/gcc.target/msp430/emulate-srli.c b/gcc/testsuite/gcc.target/msp430/emulate-srli.c
new file mode 100644
index 00000000000..c10f30b2779
--- /dev/null
+++ b/gcc/testsuite/gcc.target/msp430/emulate-srli.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-Os" } */
+/* { dg-final { scan-assembler-not "mspabi_srli" } } */
+/* { dg-final { scan-assembler "rrum" } } */
+
+/* Ensure that HImode shifts with source operand in memory are emulated with a
+   rotate instructions.  */
+
+unsigned int a;
+
+void
+foo (void)
+{
+  a = a >> 4;
+}