From: Ben Widawsky Date: Thu, 16 Apr 2015 16:16:19 +0000 (-0700) Subject: i965: Add all surface types to the batch decode X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e45a292556df95280bd06ca78db901e39c0660e1;p=mesa.git i965: Add all surface types to the batch decode It's true that not all surfaces apply for every gen, but for the most part this is what we want. (The unfortunate case is when we use a valid surface, but not for the specific GEN). This was automated with a vim macro. v2: Shortened common forms such as R8G8B8A8->RGBA8. Note that this makes some of the sample output in subsequent commits slightly incorrect. v3: Use the name from the table (Ken). This requires declaring the surface format array as extern, and declaring the struct in the .h file. v4: Move the struct back and create a helper function to obtain the name (Ken) Get rid of the now useless helper in the state_dump.c Signed-off-by: Ben Widawsky Reviewed-by: Topi Pohjolainen (v3) Reviewed-by: Kenneth Graunke --- diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h index 26fdae64ea4..bc79fb6d882 100644 --- a/src/mesa/drivers/dri/i965/brw_state.h +++ b/src/mesa/drivers/dri/i965/brw_state.h @@ -246,6 +246,7 @@ void brw_configure_w_tiled(const struct intel_mipmap_tree *mt, unsigned *pitch, uint32_t *tiling, unsigned *format); +const char *brw_surface_format_name(unsigned format); uint32_t brw_format_for_mesa_format(mesa_format mesa_format); GLuint translate_tex_target(GLenum target); diff --git a/src/mesa/drivers/dri/i965/brw_state_dump.c b/src/mesa/drivers/dri/i965/brw_state_dump.c index 530f5a8b76e..85daf2fe558 100644 --- a/src/mesa/drivers/dri/i965/brw_state_dump.c +++ b/src/mesa/drivers/dri/i965/brw_state_dump.c @@ -31,6 +31,7 @@ #include "brw_context.h" #include "brw_defines.h" #include "brw_eu.h" +#include "brw_state.h" static void batch_out(struct brw_context *brw, const char *name, uint32_t offset, @@ -64,19 +65,6 @@ get_965_surfacetype(unsigned int surfacetype) } } -static const char * -get_965_surface_format(unsigned int surface_format) -{ - switch (surface_format) { - case 0x000: return "r32g32b32a32_float"; - case 0x0c1: return "b8g8r8a8_unorm"; - case 0x100: return "b5g6r5_unorm"; - case 0x102: return "b5g5r5a1_unorm"; - case 0x104: return "b4g4r4a4_unorm"; - default: return "unknown"; - } -} - static void dump_vs_state(struct brw_context *brw, uint32_t offset) { const char *name = "VS_STATE"; @@ -176,7 +164,7 @@ static void dump_surface_state(struct brw_context *brw, uint32_t offset) batch_out(brw, name, offset, 0, "%s %s\n", get_965_surfacetype(GET_FIELD(surf[0], BRW_SURFACE_TYPE)), - get_965_surface_format(GET_FIELD(surf[0], BRW_SURFACE_FORMAT))); + brw_surface_format_name(GET_FIELD(surf[0], BRW_SURFACE_FORMAT))); batch_out(brw, name, offset, 1, "offset\n"); batch_out(brw, name, offset, 2, "%dx%d size, %d mips\n", GET_FIELD(surf[2], BRW_SURFACE_WIDTH) + 1, @@ -200,7 +188,7 @@ static void dump_gen7_surface_state(struct brw_context *brw, uint32_t offset) batch_out(brw, name, offset, 0, "%s %s %s\n", get_965_surfacetype(GET_FIELD(surf[0], BRW_SURFACE_TYPE)), - get_965_surface_format(GET_FIELD(surf[0], BRW_SURFACE_FORMAT)), + brw_surface_format_name(GET_FIELD(surf[0], BRW_SURFACE_FORMAT)), (surf[0] & GEN7_SURFACE_IS_ARRAY) ? "array" : ""); batch_out(brw, name, offset, 1, "offset\n"); batch_out(brw, name, offset, 2, "%dx%d size, %d mips, %d slices\n", diff --git a/src/mesa/drivers/dri/i965/brw_surface_formats.c b/src/mesa/drivers/dri/i965/brw_surface_formats.c index 97136d0ce4f..05016067bba 100644 --- a/src/mesa/drivers/dri/i965/brw_surface_formats.c +++ b/src/mesa/drivers/dri/i965/brw_surface_formats.c @@ -311,6 +311,12 @@ const struct surface_format_info surface_formats[] = { #undef x #undef Y +const char * +brw_surface_format_name(unsigned format) +{ + return surface_formats[format].name; +} + uint32_t brw_format_for_mesa_format(mesa_format mesa_format) {