From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Mon, 4 Apr 2022 17:08:59 +0000 (+0100)
Subject: increase power-on-delay for icarus sim to allow reset to occur
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e47aa2b2665dc9c056136c3857e0c5dadaf57f6c;p=ls2.git

increase power-on-delay for icarus sim to allow reset to occur
---

diff --git a/src/ls2.py b/src/ls2.py
index 04a10bf..91d3779 100644
--- a/src/ls2.py
+++ b/src/ls2.py
@@ -281,7 +281,7 @@ class DDR3SoC(SoC, Elaboratable):
         pod_bits = 25
         if fpga in ['versa_ecp5', 'versa_ecp5_85', 'isim', 'ulx3s']:
             if fpga in ['isim']:
-                pod_bits = 2
+                pod_bits = 6
             self.crg = ECP5CRG(clk_freq, pod_bits)
         if fpga in ['arty_a7']:
             self.crg = ArtyA7CRG(clk_freq)