From: Aaron Watry Date: Fri, 9 Jun 2017 17:57:42 +0000 (-0500) Subject: radeon/winsys: Limit max allocation size to 70% of VRAM X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e4d06e4c531157f1f3e4683487ee9c81fa0cff9b;p=mesa.git radeon/winsys: Limit max allocation size to 70% of VRAM The CL CTS queries the max allocation size, and then attempts to allocate buffers of that size. If not enough contiguous RAM/VRAM is available, this causes errors in the radeon kernel module due to inability to allocate the required memory. It's a bit of a hack, but experimentally on my system, I can use ~3/4 of the card's VRAM for a single global/constant buffer allocation given current GUI/compositor use. For a 1GB Pitcairn (HD7850) this gets me from the reported clinfo values of: Global memory size 2143076352 (1.996GiB) Max memory allocation 1500153446 (1.397GiB) Max constant buffer size 1500153446 (1.397GiB) To: Global memory size 2143076352 (1.996GiB) Max memory allocation 751619276 (716MiB) Max constant buffer size 751619276 (716MiB) Fixes: OpenCL CTS test/conformance/api/min_max_mem_alloc_size, OpenCL CTS test/conformance/api/min_max_constant_buffer_size Signed-off-by: Aaron Watry Reviewed-by: Marek Olšák --- diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c index 9bbffa514a4..e0d4cc8d773 100644 --- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c +++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c @@ -365,6 +365,8 @@ static bool do_winsys_init(struct radeon_drm_winsys *ws) /* Radeon allocates all buffers as contigous, which makes large allocations * unlikely to succeed. */ ws->info.max_alloc_size = MAX2(ws->info.vram_size, ws->info.gart_size) * 0.7; + if (ws->info.has_dedicated_vram) + ws->info.max_alloc_size = MIN2(ws->info.vram_size * 0.7, ws->info.max_alloc_size); if (ws->info.drm_minor < 40) ws->info.max_alloc_size = MIN2(ws->info.max_alloc_size, 256*1024*1024);