From: lkcl <lkcl@web>
Date: Wed, 27 Jul 2022 14:31:08 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~1008
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e4e0f0d3eb84b4923875c5d920186cda455f6992;p=libreriscv.git

---

diff --git a/nlnet_2022_opf_isa_wg.mdwn b/nlnet_2022_opf_isa_wg.mdwn
index 971dafbf4..cf0ec8ff4 100644
--- a/nlnet_2022_opf_isa_wg.mdwn
+++ b/nlnet_2022_opf_isa_wg.mdwn
@@ -75,6 +75,20 @@ EUR 100,000.
 
 # Compare your own project with existing or historical efforts.
 
+We are developing a Cray-style Scalable Vector ISA Extension for
+the Supercomputing-class Power ISA.  Similar historic ISAs include
+Cray YMP1, ETA-19, Cyber CDC 205. More recent is the NEC SX Aurora.
+They are all proprietary systems: Libre-SOC's efforts are entirely
+FOSSHW.
+
+Open Scalable Vector ISAs include MRISC32/64 (in early development) and
+RISC-V RVV. Advocates of RISC-V have been discovering to their dismay
+that RVV and RISC-V has fundamental issues that cannot be fixed.
+Additionally, submission of ISA modifications requires RISCV Foundation
+Membership which puts us under impossible conflict of interest with
+Full Transparency Conditions not only with NLnet but also with
+EU Auditing Requirements.  By direct contrast OPF External RFC Submission
+does not require Secrecy.
 
 ## What are significant technical challenges you expect to solve during the project, if any?