From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Fri, 8 May 2020 14:54:32 +0000 (+0100)
Subject: added under consideration, SDRAM
X-Git-Tag: convert-csv-opcode-to-binary~2700
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e4f21d4cc5b1fc8b167632b74a7600c27df89045;p=libreriscv.git

added under consideration, SDRAM
---

diff --git a/180nm_Oct2020/interfaces.mdwn b/180nm_Oct2020/interfaces.mdwn
index ce72e9628..eda03f060 100644
--- a/180nm_Oct2020/interfaces.mdwn
+++ b/180nm_Oct2020/interfaces.mdwn
@@ -12,6 +12,10 @@ These are bare minimum viability:
 * [[shakti/m_class/LPC]]
 * [[shakti/m_class/EINT]]
 
+Under consideration:
+
+* [[shakti/m_class/sdram]] see <http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2020-May/006374.html>
+
 # Secondary priorities
 
 TODO