From: Segher Boessenkool Date: Thu, 11 Sep 2014 18:29:50 +0000 (+0200) Subject: htm.md (tabort, [...]): Use xor instead of minus. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e4fb6f093c1657d590e37f39f832652d133dcb3b;p=gcc.git htm.md (tabort, [...]): Use xor instead of minus. 2014-09-11 Segher Boessenkool * config/rs6000/htm.md (tabort, tabortdc, tabortdci, tabortwc, tabortwci, tbegin, tcheck, tend, trechkpt, treclaim, tsr): Use xor instead of minus. * config/rs6000/vector.md (cr6_test_for_zero_reverse, cr6_test_for_lt_reverse): Ditto. From-SVN: r215187 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 82d70dfc551..5ffd95158f5 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2014-09-11 Segher Boessenkool + + * config/rs6000/htm.md (tabort, tabortdc, tabortdci, tabortwc, + tabortwci, tbegin, tcheck, tend, trechkpt, treclaim, tsr): Use xor + instead of minus. + * config/rs6000/vector.md (cr6_test_for_zero_reverse, + cr6_test_for_lt_reverse): Ditto. + 2014-09-11 Paolo Carlini PR c++/61489 diff --git a/gcc/config/rs6000/htm.md b/gcc/config/rs6000/htm.md index 140212b4218..03948b1779b 100644 --- a/gcc/config/rs6000/htm.md +++ b/gcc/config/rs6000/htm.md @@ -55,7 +55,8 @@ (eq:SI (match_dup 2) (const_int 0))) (set (match_operand:SI 0 "int_reg_operand" "") - (minus:SI (const_int 1) (match_dup 3)))] + (xor:SI (match_dup 3) + (const_int 1)))] "TARGET_HTM" { operands[2] = gen_rtx_REG (CCmode, CR0_REGNO); @@ -81,7 +82,8 @@ (eq:SI (match_dup 4) (const_int 0))) (set (match_operand:SI 0 "int_reg_operand" "") - (minus:SI (const_int 1) (match_dup 5)))] + (xor:SI (match_dup 5) + (const_int 1)))] "TARGET_HTM" { operands[4] = gen_rtx_REG (CCmode, CR0_REGNO); @@ -109,7 +111,8 @@ (eq:SI (match_dup 4) (const_int 0))) (set (match_operand:SI 0 "int_reg_operand" "") - (minus:SI (const_int 1) (match_dup 5)))] + (xor:SI (match_dup 5) + (const_int 1)))] "TARGET_HTM" { operands[4] = gen_rtx_REG (CCmode, CR0_REGNO); @@ -137,7 +140,8 @@ (eq:SI (match_dup 4) (const_int 0))) (set (match_operand:SI 0 "int_reg_operand" "") - (minus:SI (const_int 1) (match_dup 5)))] + (xor:SI (match_dup 5) + (const_int 1)))] "TARGET_HTM" { operands[4] = gen_rtx_REG (CCmode, CR0_REGNO); @@ -165,7 +169,8 @@ (eq:SI (match_dup 4) (const_int 0))) (set (match_operand:SI 0 "int_reg_operand" "") - (minus:SI (const_int 1) (match_dup 5)))] + (xor:SI (match_dup 5) + (const_int 1)))] "TARGET_HTM" { operands[4] = gen_rtx_REG (CCmode, CR0_REGNO); @@ -209,7 +214,8 @@ (eq:SI (match_dup 2) (const_int 0))) (set (match_operand:SI 0 "int_reg_operand" "") - (minus:SI (const_int 1) (match_dup 3)))] + (xor:SI (match_dup 3) + (const_int 1)))] "TARGET_HTM" { operands[2] = gen_rtx_REG (CCmode, CR0_REGNO); @@ -233,7 +239,8 @@ (eq:SI (match_dup 2) (const_int 0))) (set (match_operand:SI 0 "int_reg_operand" "") - (minus:SI (const_int 1) (match_dup 3)))] + (xor:SI (match_dup 3) + (const_int 1)))] "TARGET_HTM" { operands[2] = gen_rtx_REG (CCmode, CR0_REGNO); @@ -257,7 +264,8 @@ (eq:SI (match_dup 2) (const_int 0))) (set (match_operand:SI 0 "int_reg_operand" "") - (minus:SI (const_int 1) (match_dup 3)))] + (xor:SI (match_dup 3) + (const_int 1)))] "TARGET_HTM" { operands[2] = gen_rtx_REG (CCmode, CR0_REGNO); @@ -281,7 +289,8 @@ (eq:SI (match_dup 1) (const_int 0))) (set (match_operand:SI 0 "int_reg_operand" "") - (minus:SI (const_int 1) (match_dup 2)))] + (xor:SI (match_dup 2) + (const_int 1)))] "TARGET_HTM" { operands[1] = gen_rtx_REG (CCmode, CR0_REGNO); @@ -305,7 +314,8 @@ (eq:SI (match_dup 2) (const_int 0))) (set (match_operand:SI 0 "int_reg_operand" "") - (minus:SI (const_int 1) (match_dup 3)))] + (xor:SI (match_dup 3) + (const_int 1)))] "TARGET_HTM" { operands[2] = gen_rtx_REG (CCmode, CR0_REGNO); @@ -329,7 +339,8 @@ (eq:SI (match_dup 2) (const_int 0))) (set (match_operand:SI 0 "int_reg_operand" "") - (minus:SI (const_int 1) (match_dup 3)))] + (xor:SI (match_dup 3) + (const_int 1)))] "TARGET_HTM" { operands[2] = gen_rtx_REG (CCmode, CR0_REGNO); diff --git a/gcc/config/rs6000/vector.md b/gcc/config/rs6000/vector.md index bfae244b497..237724ec39e 100644 --- a/gcc/config/rs6000/vector.md +++ b/gcc/config/rs6000/vector.md @@ -686,7 +686,9 @@ [(set (match_operand:SI 0 "register_operand" "=r") (eq:SI (reg:CC 74) (const_int 0))) - (set (match_dup 0) (minus:SI (const_int 1) (match_dup 0)))] + (set (match_dup 0) + (xor:SI (match_dup 0) + (const_int 1)))] "TARGET_ALTIVEC || TARGET_VSX" "") @@ -701,7 +703,9 @@ [(set (match_operand:SI 0 "register_operand" "=r") (lt:SI (reg:CC 74) (const_int 0))) - (set (match_dup 0) (minus:SI (const_int 1) (match_dup 0)))] + (set (match_dup 0) + (xor:SI (match_dup 0) + (const_int 1)))] "TARGET_ALTIVEC || TARGET_VSX" "")