From: Claudiu Zissulescu Date: Tue, 29 Dec 2020 11:30:04 +0000 (+0200) Subject: arc: Fix cached to uncached moves. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e51727c6912c0b0190b3bd8f64e711e2eecbc045;p=gcc.git arc: Fix cached to uncached moves. We need an temporary register when moving data from a cached memory to an uncached memory. Fix this issue and add a test for it. gcc/ 2020-12-29 Claudiu Zissulescu * config/arc/arc.c (prepare_move_operands): Use a temporary registers when we have cached mem-to-uncached mem moves. gcc/testsuite/ 2020-12-29 Vladimir Isaev * gcc.target/arc/uncached-9.c: New test. Signed-off-by: Claudiu Zissulescu --- diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c index 6a9e1fbf824..d0a52ee8b8d 100644 --- a/gcc/config/arc/arc.c +++ b/gcc/config/arc/arc.c @@ -9234,13 +9234,21 @@ prepare_move_operands (rtx *operands, machine_mode mode) } if (arc_is_uncached_mem_p (operands[1])) { + rtx tmp = operands[0]; + if (MEM_P (operands[0])) - operands[0] = force_reg (mode, operands[0]); + tmp = gen_reg_rtx (mode); + emit_insn (gen_rtx_SET - (operands[0], + (tmp, gen_rtx_UNSPEC_VOLATILE (mode, gen_rtvec (1, operands[1]), VUNSPEC_ARC_LDDI))); + if (MEM_P (operands[0])) + { + operands[1] = tmp; + return false; + } return true; } } diff --git a/gcc/testsuite/gcc.target/arc/uncached-9.c b/gcc/testsuite/gcc.target/arc/uncached-9.c new file mode 100644 index 00000000000..4caba293bc5 --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/uncached-9.c @@ -0,0 +1,39 @@ +/* { dg-do run } */ +/* { dg-options "-O2" } */ + +#include + +struct uncached_st +{ + int value; +} __attribute__((uncached)); + +struct cached_st +{ + int value; +}; + +struct uncached_st g_uncached_st = + { + .value = 17 + }; + +struct cached_st g_cached_st = + { + .value = 4 + }; + +void __attribute__((noinline)) test_struct_copy (void) +{ + g_cached_st.value = g_uncached_st.value; +} + +int main (void) +{ + test_struct_copy(); + + if (g_cached_st.value != g_uncached_st.value) + abort (); + + return 0; +}