From: Iago Toral Quiroga <itoral@igalia.com>
Date: Tue, 27 Nov 2018 07:57:13 +0000 (+0100)
Subject: intel/compiler: fix register allocation in opt_peephole_sel
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e55cbf26ea5ff56a80a55b38e3964ee13a5cfeff;p=mesa.git

intel/compiler: fix register allocation in opt_peephole_sel

This wasn't handling 64-bit cases properly. Found by inspection.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
---

diff --git a/src/intel/compiler/brw_fs_sel_peephole.cpp b/src/intel/compiler/brw_fs_sel_peephole.cpp
index fd02792bebc..6395b409b7c 100644
--- a/src/intel/compiler/brw_fs_sel_peephole.cpp
+++ b/src/intel/compiler/brw_fs_sel_peephole.cpp
@@ -198,8 +198,7 @@ fs_visitor::opt_peephole_sel()
              */
             fs_reg src0(then_mov[i]->src[0]);
             if (src0.file == IMM) {
-               src0 = vgrf(glsl_type::float_type);
-               src0.type = then_mov[i]->src[0].type;
+               src0 = ibld.vgrf(then_mov[i]->src[0].type);
                ibld.MOV(src0, then_mov[i]->src[0]);
             }