From: Korey Sewell Date: Mon, 20 Jun 2011 01:43:41 +0000 (-0400) Subject: inorder: add necessary debug flag header files X-Git-Tag: stable_2012_02_02~212 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e572c01120fce6502d31f17a91f4bb83c6f9c3fe;p=gem5.git inorder: add necessary debug flag header files --- diff --git a/src/cpu/inorder/cpu.cc b/src/cpu/inorder/cpu.cc index 158489f86..8188ac354 100644 --- a/src/cpu/inorder/cpu.cc +++ b/src/cpu/inorder/cpu.cc @@ -52,6 +52,7 @@ #include "debug/InOrderCPU.hh" #include "debug/RefCount.hh" #include "debug/SkedCache.hh" +#include "debug/Quiesce.hh" #include "mem/translating_port.hh" #include "params/InOrderCPU.hh" #include "sim/process.hh" diff --git a/src/cpu/inorder/resource.cc b/src/cpu/inorder/resource.cc index 9eec63062..8bc355f5c 100644 --- a/src/cpu/inorder/resource.cc +++ b/src/cpu/inorder/resource.cc @@ -36,6 +36,7 @@ #include "cpu/inorder/cpu.hh" #include "cpu/inorder/resource.hh" #include "cpu/inorder/resource_pool.hh" +#include "debug/ExecFaulting.hh" #include "debug/RefCount.hh" #include "debug/ResReqCount.hh" #include "debug/Resource.hh" diff --git a/src/cpu/inorder/resources/branch_predictor.cc b/src/cpu/inorder/resources/branch_predictor.cc index 0dab5a70f..65b95ff31 100644 --- a/src/cpu/inorder/resources/branch_predictor.cc +++ b/src/cpu/inorder/resources/branch_predictor.cc @@ -33,6 +33,7 @@ #include "cpu/inorder/resources/branch_predictor.hh" #include "debug/InOrderBPred.hh" #include "debug/InOrderStage.hh" +#include "debug/Resource.hh" using namespace std; using namespace TheISA; diff --git a/src/cpu/inorder/resources/cache_unit.cc b/src/cpu/inorder/resources/cache_unit.cc index 39afd296e..94f2d0461 100644 --- a/src/cpu/inorder/resources/cache_unit.cc +++ b/src/cpu/inorder/resources/cache_unit.cc @@ -98,7 +98,7 @@ CacheUnit::CachePort::recvStatusChange(Status status) bool CacheUnit::CachePort::recvTiming(Packet *pkt) { - DPRINTF(Cache, "RecvTiming: Pkt %x,\n", pkt->getAddr()); + DPRINTF(InOrderCachePort, "RecvTiming: Pkt %x,\n", pkt->getAddr()); if (pkt->isError()) DPRINTF(InOrderCachePort, "Got error packet back for address: %x\n", @@ -1218,7 +1218,7 @@ CacheUnitEvent::process() //@todo: eventually, we should do a timing translation w/ // hw page table walk on tlb miss - DPRINTF(Fault, "Handling Fault %s : [sn:%i] %x\n", inst->fault->name(), inst->seqNum, inst->getMemAddr()); + DPRINTF(InOrderTLB, "Handling Fault %s : [sn:%i] %x\n", inst->fault->name(), inst->seqNum, inst->getMemAddr()); inst->fault->invoke(tlb_res->cpu->tcBase(tid), inst->staticInst); tlb_res->tlbBlocked[tid] = false; diff --git a/src/cpu/inorder/resources/decode_unit.cc b/src/cpu/inorder/resources/decode_unit.cc index a3548edfc..d0cf7ffb2 100644 --- a/src/cpu/inorder/resources/decode_unit.cc +++ b/src/cpu/inorder/resources/decode_unit.cc @@ -62,12 +62,12 @@ DecodeUnit::execute(int slot_num) if (inst->fault != NoFault) { inst->setBackSked(cpu->faultSked); - DPRINTF(Decode,"[tid:%i]: Fault found for instruction [sn:%i]\n", + DPRINTF(InOrderDecode,"[tid:%i]: Fault found for instruction [sn:%i]\n", inst->readTid(), inst->seqNum); } else { assert(!inst->staticInst->isMacroop()); inst->setBackSked(cpu->createBackEndSked(inst)); - DPRINTF(Decode,"Decoded instruction [sn:%i]: %s : 0x%x\n", + DPRINTF(InOrderDecode,"Decoded instruction [sn:%i]: %s : 0x%x\n", inst->seqNum, inst->instName(), inst->staticInst->machInst); } diff --git a/src/cpu/inorder/resources/execution_unit.cc b/src/cpu/inorder/resources/execution_unit.cc index 255756956..a0a486269 100644 --- a/src/cpu/inorder/resources/execution_unit.cc +++ b/src/cpu/inorder/resources/execution_unit.cc @@ -35,6 +35,7 @@ #include "cpu/inorder/resources/execution_unit.hh" #include "cpu/inorder/cpu.hh" #include "cpu/inorder/resource_pool.hh" +#include "debug/Fault.hh" #include "debug/InOrderExecute.hh" #include "debug/InOrderStall.hh" diff --git a/src/cpu/inorder/resources/fetch_seq_unit.cc b/src/cpu/inorder/resources/fetch_seq_unit.cc index 71507e2d8..6bab9ea50 100644 --- a/src/cpu/inorder/resources/fetch_seq_unit.cc +++ b/src/cpu/inorder/resources/fetch_seq_unit.cc @@ -209,13 +209,10 @@ FetchSeqUnit::squash(DynInstPtr inst, int squash_stage, } if (bdelay_inst) { - DPRINTF(Resource, "Evaluating %s v. %s\n", - bdelay_inst->pc, nextPC); - if (bdelay_inst->pc.instAddr() == nextPC.instAddr()) { bdelay_inst->pc = nextPC; advancePC(nextPC, inst->staticInst); - DPRINTF(Resource, "Advanced PC to %s\n", nextPC); + DPRINTF(InOrderFetchSeq, "Advanced PC to %s\n", nextPC); } } } else {