From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Wed, 11 Aug 2021 19:44:56 +0000 (+0100)
Subject: get new ISATestCaller set up with correct function params
X-Git-Tag: xlen-bcd~138
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e599c51b63c85a9029827b116a5288d7170a4327;p=openpower-isa.git

get new ISATestCaller set up with correct function params
---

diff --git a/src/openpower/decoder/isa/test_caller.py b/src/openpower/decoder/isa/test_caller.py
index 11334f65..8d2c0020 100644
--- a/src/openpower/decoder/isa/test_caller.py
+++ b/src/openpower/decoder/isa/test_caller.py
@@ -46,16 +46,16 @@ class ISATestRunner(FHDLTestCase):
                     insncode = generator.assembly.splitlines()
                     instructions = list(zip(gen, insncode))
 
-                    simulator = ISA(pdecode2, test.initial_regs,
-                                    test.initial_sprs,
-                                    test.initial_cr,
+                    simulator = ISA(pdecode2, test.regs,
+                                    test.sprs,
+                                    test.cr,
                                     initial_insns=gen, respect_pc=True,
                                     initial_svstate=test.svstate,
-                                    initial_mem=mem,
-                                    fpregfile=test.initial_fprs,
+                                    initial_mem=test.mem,
+                                    fpregfile=None,
                                     disassembly=insncode,
                                     bigendian=0,
-                                    mmu=mmu)
+                                    mmu=False)
 
                     print ("GPRs")
                     simulator.gpr.dump()
@@ -89,7 +89,6 @@ class ISATestRunner(FHDLTestCase):
         with sim.write_vcd("simulator.vcd", "simulator.gtkw",
                            traces=[]):
             sim.run()
-        return simulator
 
 
 def run_tst(generator, initial_regs, initial_sprs=None, svstate=0, mmu=False,