From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sun, 2 Dec 2018 12:22:53 +0000 (+0000)
Subject: add links
X-Git-Tag: convert-csv-opcode-to-binary~4820
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e5b8e76457ef19f47213ebb900f29aa7ab664a30;p=libreriscv.git

add links
---

diff --git a/3d_gpu/microarchitecture.mdwn b/3d_gpu/microarchitecture.mdwn
index 273d11e83..cab0d2deb 100644
--- a/3d_gpu/microarchitecture.mdwn
+++ b/3d_gpu/microarchitecture.mdwn
@@ -115,6 +115,8 @@ called the flip-flops orchestrating the timing "collectors".
   reservation stations take a *lot* of power.
 * MESI cache protocol, python <https://github.com/sunkarapk/mesi-cache.git>
   <https://github.com/afwolfe/mesi-simulator>
+* <https://kshitizdange.github.io/418CacheSim/final-report> report on
+  types of caches
 * <https://github.com/ssc3?tab=repositories> interesting stuff
 * <https://en.wikipedia.org/wiki/Classic_RISC_pipeline#Solution_A._Bypassing>
   pipeline bypassing