From: Gabe Black <gblack@eecs.umich.edu>
Date: Wed, 1 Aug 2007 19:49:58 +0000 (-0700)
Subject: X86: Fix for compilation bug with new cache code.
X-Git-Tag: m5_2.0_beta4~216
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e5e5b0119d6219782c834d29a63a7bb152a68dc5;p=gem5.git

X86: Fix for compilation bug with new cache code.

--HG--
extra : convert_revision : 073c6db0796cd2c11b8293b382b438a2a959b821
---

diff --git a/src/arch/x86/isa/microops/ldstop.isa b/src/arch/x86/isa/microops/ldstop.isa
index 18cbc6082..b8cddb09b 100644
--- a/src/arch/x86/isa/microops/ldstop.isa
+++ b/src/arch/x86/isa/microops/ldstop.isa
@@ -170,7 +170,7 @@ def template MicroLoadCompleteAcc {{
         %(op_rd)s;
 
         Mem = pkt->get<typeof(Mem)>();
-        int offset = pkt->flags;
+        int offset = pkt->req->getFlags();
         Mem = bits(Mem, (offset + dataSize) * 8 - 1,  offset * 8);
         %(code)s;