From: Kirill Yukhin <kirill.yukhin@intel.com>
Date: Thu, 23 Oct 2014 11:50:19 +0000 (+0000)
Subject: AVX. Fix block absq emit for non AVX-512 targets.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e650a5685c92e4e8c54b649e77e351ba06bcb3f3;p=gcc.git

AVX. Fix block absq emit for non AVX-512 targets.

gcc/
	* config/i386/sse.md (define_mode_iterator VI1248_AVX512VL_AVX512BW):
	New.
	(define_insn "*abs<mode>2"): Use VI1248_AVX512VL_AVX512BW mode
	iterator.
	(define_expand "abs<mode>2"): Ditto.

gcc/testsuite/
	* gcc.target/i386/pr63600.c: New.

From-SVN: r216591
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 45ec506d647..1f4a72b0327 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2014-10-23  Kirill Yukhin  <kirill.yukhin@intel.com>
+
+	* config/i386/sse.md (define_mode_iterator VI1248_AVX512VL_AVX512BW):
+	New.
+	(define_insn "*abs<mode>2"): Use VI1248_AVX512VL_AVX512BW mode
+	iterator.
+	(define_expand "abs<mode>2"): Ditto.
+
 2014-10-23  Kirill Yukhin  <kirill.yukhin@intel.com>
 
 	* tree-core.h (tree_var_decl): Extend `function_code' field
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index b7c2c4f59be..5986d4b2361 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -13785,10 +13785,18 @@
    (set (attr "prefix_rex") (symbol_ref "x86_extended_reg_mentioned_p (insn)"))
    (set_attr "mode" "DI")])
 
+;; Mode iterator to handle singularity w/ absence of V2DI and V4DI
+;; modes for abs instruction on pre AVX-512 targets.
+(define_mode_iterator VI1248_AVX512VL_AVX512BW
+  [(V64QI "TARGET_AVX512BW") (V32QI "TARGET_AVX2") V16QI
+   (V32HI "TARGET_AVX512BW") (V16HI "TARGET_AVX2") V8HI
+   (V16SI "TARGET_AVX512F") (V8SI "TARGET_AVX2") V4SI
+   (V8DI "TARGET_AVX512F") (V4DI "TARGET_AVX512VL") (V2DI "TARGET_AVX512VL")])
+
 (define_insn "*abs<mode>2"
-  [(set (match_operand:VI_AVX2 0 "register_operand" "=v")
-	(abs:VI_AVX2
-	  (match_operand:VI_AVX2 1 "nonimmediate_operand" "vm")))]
+  [(set (match_operand:VI1248_AVX512VL_AVX512BW 0 "register_operand" "=v")
+	(abs:VI1248_AVX512VL_AVX512BW
+	  (match_operand:VI1248_AVX512VL_AVX512BW 1 "nonimmediate_operand" "vm")))]
   "TARGET_SSSE3"
   "%vpabs<ssemodesuffix>\t{%1, %0|%0, %1}"
   [(set_attr "type" "sselog1")
@@ -13824,9 +13832,9 @@
    (set_attr "mode" "<sseinsnmode>")])
 
 (define_expand "abs<mode>2"
-  [(set (match_operand:VI_AVX2 0 "register_operand")
-	(abs:VI_AVX2
-	  (match_operand:VI_AVX2 1 "nonimmediate_operand")))]
+  [(set (match_operand:VI1248_AVX512VL_AVX512BW 0 "register_operand")
+	(abs:VI1248_AVX512VL_AVX512BW
+	  (match_operand:VI1248_AVX512VL_AVX512BW 1 "nonimmediate_operand")))]
   "TARGET_SSE2"
 {
   if (!TARGET_SSSE3)
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 377a7fcbfb1..a3f1308ebc4 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2014-10-10  Kirill Yukhin  <kirill.yukhin@intel.com>
+
+	* gcc.target/i386/pr63600.c: New.
+
 2014-10-23  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
 
 	* gcc.dg/ipa/ipa-icf-21.c: Add -msse2 to dg-options.
diff --git a/gcc/testsuite/gcc.target/i386/pr63600.c b/gcc/testsuite/gcc.target/i386/pr63600.c
new file mode 100644
index 00000000000..da7ea503f06
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr63600.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-O3 -msse" } */
+
+long *a, b;
+int c;
+void
+foo (void)
+{
+  for (c = 0; c < 64; c++)
+    a[c] = b >= 0 ? b : -b;
+}