From: Rafael Antognolli Date: Mon, 4 Nov 2019 22:04:25 +0000 (-0800) Subject: iris/bufmgr: Do not use map_gtt or use set/get_tiling on DG1 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e6588354360d102f3bfbfdfd484490a6ae296142;p=mesa.git iris/bufmgr: Do not use map_gtt or use set/get_tiling on DG1 We are starting to see platforms that don't support the get/set tiling uAPI. (For example, DG1.) Additionally on DG1 we shouldn't be using the map_gtt anymore. Let's add some asserts and make sure we don't take those paths accidentally. Rework: * Jordan: Only apply for DG1, not all gen12 * Rafael: Use has_tiling_uapi * Jordan: Copy has_tiling_uapi from devinfo * Jordan: merge in "iris: Rework iris_bo_import_dmabuf() a little." * Jordan: Continue to call get/set_tiling on modifier path Signed-off-by: Jordan Justen Reviewed-by: Lionel Landwerlin Part-of: --- diff --git a/src/gallium/drivers/iris/iris_bufmgr.c b/src/gallium/drivers/iris/iris_bufmgr.c index 10115a407c4..7a654e677ba 100644 --- a/src/gallium/drivers/iris/iris_bufmgr.c +++ b/src/gallium/drivers/iris/iris_bufmgr.c @@ -174,6 +174,7 @@ struct iris_bufmgr { bool has_llc:1; bool has_mmap_offset:1; + bool has_tiling_uapi:1; bool bo_reuse:1; struct gen_aux_map_context *aux_map_ctx; @@ -1115,6 +1116,11 @@ iris_bo_map_gtt(struct pipe_debug_callback *dbg, { struct iris_bufmgr *bufmgr = bo->bufmgr; + /* If we don't support get/set_tiling, there's no support for GTT mapping + * either (it won't do any de-tiling for us). + */ + assert(bufmgr->has_tiling_uapi); + /* Get a mapping of the buffer if we haven't before. */ if (bo->map_gtt == NULL) { DBG("bo_map_gtt: mmap %d (%s)\n", bo->gem_handle, bo->name); @@ -1342,6 +1348,15 @@ bo_set_tiling_internal(struct iris_bo *bo, uint32_t tiling_mode, tiling_mode == bo->tiling_mode && stride == bo->stride) return 0; + /* If we can't do map_gtt, the set/get_tiling API isn't useful. And it's + * actually not supported by the kernel in those cases. + */ + if (!bufmgr->has_tiling_uapi) { + bo->tiling_mode = tiling_mode; + bo->stride = stride; + return 0; + } + memset(&set_tiling, 0, sizeof(set_tiling)); do { /* set_tiling is slightly broken and overwrites the @@ -1364,7 +1379,7 @@ bo_set_tiling_internal(struct iris_bo *bo, uint32_t tiling_mode, struct iris_bo * iris_bo_import_dmabuf(struct iris_bufmgr *bufmgr, int prime_fd, - uint32_t tiling, uint32_t stride) + int tiling, uint32_t stride) { uint32_t handle; struct iris_bo *bo; @@ -1425,14 +1440,20 @@ iris_bo_import_dmabuf(struct iris_bufmgr *bufmgr, int prime_fd, _mesa_hash_table_insert(bufmgr->handle_table, &bo->gem_handle, bo); struct drm_i915_gem_get_tiling get_tiling = { .handle = bo->gem_handle }; - if (gen_ioctl(bufmgr->fd, DRM_IOCTL_I915_GEM_GET_TILING, &get_tiling)) + if (!bufmgr->has_tiling_uapi) + get_tiling.tiling_mode = I915_TILING_NONE; + else if (gen_ioctl(bufmgr->fd, DRM_IOCTL_I915_GEM_GET_TILING, &get_tiling)) goto err; - if (get_tiling.tiling_mode == tiling || tiling > I915_TILING_LAST) { + if (tiling == -1) { bo->tiling_mode = get_tiling.tiling_mode; - /* XXX stride is unknown */ + /* XXX stride is unknown */ } else { - if (bo_set_tiling_internal(bo, tiling, stride)) { + /* Modifiers path */ + if (get_tiling.tiling_mode == tiling || !bufmgr->has_tiling_uapi) { + bo->tiling_mode = tiling; + bo->stride = stride; + } else if (bo_set_tiling_internal(bo, tiling, stride)) { goto err; } } @@ -1827,6 +1848,7 @@ iris_bufmgr_create(struct gen_device_info *devinfo, int fd, bool bo_reuse) list_inithead(&bufmgr->zombie_list); bufmgr->has_llc = devinfo->has_llc; + bufmgr->has_tiling_uapi = devinfo->has_tiling_uapi; bufmgr->bo_reuse = bo_reuse; bufmgr->has_mmap_offset = gem_param(fd, I915_PARAM_MMAP_GTT_VERSION) >= 4; diff --git a/src/gallium/drivers/iris/iris_bufmgr.h b/src/gallium/drivers/iris/iris_bufmgr.h index 7c4a88703f8..d1594ff3d62 100644 --- a/src/gallium/drivers/iris/iris_bufmgr.h +++ b/src/gallium/drivers/iris/iris_bufmgr.h @@ -393,7 +393,7 @@ void iris_destroy_hw_context(struct iris_bufmgr *bufmgr, uint32_t ctx_id); int iris_bo_export_dmabuf(struct iris_bo *bo, int *prime_fd); struct iris_bo *iris_bo_import_dmabuf(struct iris_bufmgr *bufmgr, int prime_fd, - uint32_t tiling, uint32_t stride); + int tiling, uint32_t stride); /** * Exports a bo as a GEM handle into a given DRM file descriptor diff --git a/src/gallium/drivers/iris/iris_resource.c b/src/gallium/drivers/iris/iris_resource.c index 032e756cd6a..ff5023f7d38 100644 --- a/src/gallium/drivers/iris/iris_resource.c +++ b/src/gallium/drivers/iris/iris_resource.c @@ -865,10 +865,14 @@ iris_resource_create_with_modifiers(struct pipe_screen *pscreen, /* Use linear for staging buffers */ if (templ->usage == PIPE_USAGE_STAGING || - templ->bind & (PIPE_BIND_LINEAR | PIPE_BIND_CURSOR) ) + templ->bind & (PIPE_BIND_LINEAR | PIPE_BIND_CURSOR) ) { tiling_flags = ISL_TILING_LINEAR_BIT; - else if (templ->bind & PIPE_BIND_SCANOUT) - tiling_flags = ISL_TILING_X_BIT; + } else if (templ->bind & PIPE_BIND_SCANOUT) { + if (devinfo->has_tiling_uapi) + tiling_flags = ISL_TILING_X_BIT; + else + tiling_flags = ISL_TILING_LINEAR_BIT; + } } isl_surf_usage_flags_t usage = pipe_bind_to_isl_usage(templ->bind); @@ -1027,7 +1031,7 @@ iris_resource_from_handle(struct pipe_screen *pscreen, struct iris_resource *res = iris_alloc_resource(pscreen, templ); const struct isl_drm_modifier_info *mod_inf = isl_drm_modifier_get_info(whandle->modifier); - uint32_t tiling; + int tiling; if (!res) return NULL; @@ -1037,7 +1041,7 @@ iris_resource_from_handle(struct pipe_screen *pscreen, if (mod_inf) tiling = isl_tiling_to_i915_tiling(mod_inf->tiling); else - tiling = I915_TILING_LAST + 1; + tiling = -1; res->bo = iris_bo_import_dmabuf(bufmgr, whandle->handle, tiling, whandle->stride); break;