From: Peter Bergner <bergner@vnet.ibm.com>
Date: Fri, 2 Mar 2018 02:54:40 +0000 (-0600)
Subject: re PR target/84534 (several powerpc test cases fail starting with r257915)
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e688c1ddef2462da3b0dc86e0ecdab87c77a6829;p=gcc.git

re PR target/84534 (several powerpc test cases fail starting with r257915)

	PR target/84534
	* gcc.target/powerpc/vec-setup-be-long.c: Add dg-xfail-run-if on
	powerpc64le*-*-linux*.
	* gcc.target/powerpc/vsx-vector-6-le.c: Do not count xxlor's.
	* gcc.target/powerpc/vsx-vector-6-le.p9.c: Likewise.

From-SVN: r258122
---

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 62fde2d5bbd..ae399f45a70 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,11 @@
+2018-03-01  Peter Bergner  <bergner@vnet.ibm.com>
+
+	PR target/84534
+	* gcc.target/powerpc/vec-setup-be-long.c: Add dg-xfail-run-if on
+	powerpc64le*-*-linux*.
+	* gcc.target/powerpc/vsx-vector-6-le.c: Do not count xxlor's.
+	* gcc.target/powerpc/vsx-vector-6-le.p9.c: Likewise.
+
 2018-03-01  Martin Sebor  <msebor@redhat.com>
 
 	PR c++/84294
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-setup-be-long.c b/gcc/testsuite/gcc.target/powerpc/vec-setup-be-long.c
index 691b378698f..75d864eee51 100644
--- a/gcc/testsuite/gcc.target/powerpc/vec-setup-be-long.c
+++ b/gcc/testsuite/gcc.target/powerpc/vec-setup-be-long.c
@@ -1,4 +1,7 @@
+/* Per PR78303, we are deprecating usage of -maltivec=be on little endian,
+   so XFAIL this test until support is actually removed.  */
 /* { dg-do run { target { powerpc64le*-*-linux* } } } */
+/* { dg-xfail-run-if "PR78303 and PR84534" { powerpc64le*-*-linux* } } */
 /* { dg-require-effective-target vsx_hw } */
 /* Disable warnings to squelch deprecation message about -maltivec=be.  */
 /* { dg-options "-w -O2 -mvsx -maltivec=be" } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-le.c b/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-le.c
index c3f795cbc15..fe7eeb12ff9 100644
--- a/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-le.c
+++ b/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-le.c
@@ -9,7 +9,11 @@
 /* { dg-final { scan-assembler-times "xvabsdp" 1 } } */
 /* { dg-final { scan-assembler-times "xvadddp" 1 } } */
 /* { dg-final { scan-assembler-times "xxlnor" 8 } } */
-/* { dg-final { scan-assembler-times "xxlor" 30 } } */
+/* We generate xxlor instructions for many reasons other than or'ing vector
+   operands or calling __builtin_vec_or(), which  means we cannot rely on
+   their usage counts being stable.  Therefore, we just ensure at least one
+   xxlor instruction was generated.  */
+/* { dg-final { scan-assembler "xxlor" } } */
 /* { dg-final { scan-assembler-times "xvcmpeqdp" 5 } } */
 /* { dg-final { scan-assembler-times "xvcmpgtdp" 8 } } */
 /* { dg-final { scan-assembler-times "xvcmpgedp" 6 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-le.p9.c b/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-le.p9.c
index 290d4b48135..c2427b8cdb6 100644
--- a/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-le.p9.c
+++ b/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-le.p9.c
@@ -9,7 +9,11 @@
 /* { dg-final { scan-assembler-times "xvabsdp" 1 } } */
 /* { dg-final { scan-assembler-times "xvadddp" 1 } } */
 /* { dg-final { scan-assembler-times "xxlnor" 7 } } */
-/* { dg-final { scan-assembler-times "xxlor" 20 } } */
+/* We generate xxlor instructions for many reasons other than or'ing vector
+   operands or calling __builtin_vec_or(), which  means we cannot rely on
+   their usage counts being stable.  Therefore, we just ensure at least one
+   xxlor instruction was generated.  */
+/* { dg-final { scan-assembler "xxlor" } } */
 /* { dg-final { scan-assembler-times "xvcmpeqdp" 5 } } */
 /* { dg-final { scan-assembler-times "xvcmpgtdp" 8 } } */
 /* { dg-final { scan-assembler-times "xvcmpgedp" 8 } } */