From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Mon, 18 Jun 2018 04:04:39 +0000 (+0100)
Subject: add slides
X-Git-Tag: convert-csv-opcode-to-binary~5171
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e6e19d594c04d4e17623f006f943ee9d77c3e01a;p=libreriscv.git

add slides
---

diff --git a/pinmux/pinmux_chennai_2018.tex b/pinmux/pinmux_chennai_2018.tex
index 391d241f2..c11dc223d 100644
--- a/pinmux/pinmux_chennai_2018.tex
+++ b/pinmux/pinmux_chennai_2018.tex
@@ -185,13 +185,18 @@
    \item I/O pad configuration conflated with Muxer conflated with GPIO
          conflated with EINT
          	     \vspace{4pt}
-   \item Need to separate all of these out
-            	     \vspace{4pt}
-   \item EINTs to be separate FNs (managed by RISC-V PLIC)
+ \end{itemize}
+   {\bf IMPORTANT to separate all of these out:
+            	     \vspace{4pt}}
+ \begin{itemize}
+   \item EINTs to be totally separate FNs. managed by RISC-V PLIC\\
+         (If every GPIO was an EINT it would mean 100+ IRQs)
             	     \vspace{4pt}
-   \item GPIO In/Out/Direction treated just like any other FN
+   \item GPIO In/Out/Direction treated just like any other FN\\
+	     (but happen to have AXI4 memory-mapping)
             	     \vspace{4pt}
-   \item Pad configuration separated and given one-to-one Registers
+   \item Pad configuration separated and given one-to-one Registers\\
+	     (SRAMs set by AXI4 to control mux, pullup, current etc.)
  \end{itemize}
 }